Nvidia Corporation

Jonathon Evans

Lacky V Shah

Philip Browning Johnson

Jerome Francis Duluk, Jr

Jonah Matthew Alben

Brian Matthew Fahs

Karim Abdalla

Gentaro Hirota

Brian S Pharris

Gregory Scott Palmer

Adam Clark Weitkemper

Gary Ward

M Wasiur Rashid

Kaushal Agarwal

Greg Palmer

Phil Johnson

A host may use address translation to convert virtual addresses to physical addresses for endpoints, which may then submit memory access requests for physical addresses. The host may record permissions granting entities access to physical addresses in physical address access permissions tables (PAAPTs) responsive to the address translation. The security of address translation services may be increased based at least on verifying memory access requests are authorized using the PAAPTs. For example, an entity identifier included in a request may be used to locate a corresponding PAAPT, and a physical address may be extracted from the request and used to locate an entry indicating whether an entity corresponding to the entity identifier has permission to access the physical address. Where the entity has permission, the system may perform the memory access using the physical address. Otherwise an error or fault code may be provided in response to the request.

Preventing unauthorized memory access using a physical address access permissions table

Apparatuses, systems, and techniques to optimize processor resources at a user-defined level. In at least one embodiment, priority of one or more tasks are adjusted to prevent one or more other dependent tasks from entering an idle state due to lack of resources to consume.

User-defined metered priority queues

A host may use address translation to convert virtual addresses to physical addresses for endpoints, which may then submit memory access requests for physical addresses. The host may incorporate the physical address and a signature of the physical address generated using a private key into a translated address field of a response to a translation request. An endpoint may treat the combination as a translated address by storing it in an entry of a translation cache, and accessing the entry for inclusion in a memory access request. The host may generate a signature of the translated address from the request using the private key, with the result being compared to the signature from the request. The memory access request may be verified when the compared values match, and the memory access may be performed using the translated address.

Preventing unauthorized translated access using address signing

Embodiments of the present invention set forth techniques for resolving page faults associated with a copy engine. A copy engine within a parallel processor receives a copy operation that includes a set of copy commands. The copy engine executes a first copy command included in the set of copy commands that results in a page fault. The copy engine stores the set of copy commands to the memory. At least one advantage of the disclosed techniques is that the copy engine can perform copy operations that involve source and destination memory pages that are not pinned, leading to reduced memory demand and greater flexibility.

Low overhead copy engine fault and switch mechanism

A system, method, and computer program product are provided for allocating processor resources to process compute workloads and graphics workloads substantially simultaneously. The method includes the steps of allocating a plurality of processing units to process tasks associated with a graphics pipeline, receiving a request to allocate at least one processing unit in the plurality of processing units to process tasks associated with a compute pipeline, and reallocating the at least one processing unit to process tasks associated with the compute pipeline.

System, method, and computer program product for simultaneous execution of compute and graphics workloads

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Santa Clara, CA, United States of America

Jonathon Evans