Nvidia Corporation

Gigafin Networks, Inc.

Mistletoe Technologies, Inc.

Jonathan Sweedler

Mark Henry Costin

Kevin J Rowett

Somsubhra Sikdar

Hoai Tran

Komal Rathi

Mike Davoudi

David Nister

Gary D Hicok

Karl Friedrich Greb

John George Mathieson

Ram Ganapathi

Ashok Srinivasan

Caveh Jalali

Clement Farabet

Mohammed Abdulla Yousuf

Michael Alan Ditty

Michael Truog

Kevin Flory

Daniel Stewart Perrin

Mike Truog

Tai-Yuen Chan

Dan Hettena

TY Chan

In various examples, activation criteria and/or braking profiles corresponding to automatic emergency braking (AEB) systems and/or collision mitigation warning (CMW) systems may be determined using sensor data representative of an environment to a front, side, and/or rear of a vehicle. For example, activation criteria for triggering an AEB system and/or CMW system may be adjusted by leveraging the availability of additional information with regards to the surrounding environment of a vehicle—such as the presence of a trailing vehicle. In addition, the braking profile for the AEB activation may be adjusted based on information about the presence of and/or location of vehicles to the front, rear, and/or side of the vehicle. By adjusting the activation criteria and/or braking profiles of an AEB system, the potential for collisions with dynamic objects in the environment is reduced and the overall safety of the vehicle and its passengers is increased.

Leveraging rear-view sensors for automatic emergency braking in autonomous machine applications

Autonomous driving is one of the world's most challenging computational problems. Very large amounts of data from cameras, RADARs, LIDARs, and HD-Maps must be processed to generate commands to control the car safely and comfortably in real-time. This challenging task requires a dedicated supercomputer that is energy-efficient and low-power, complex high-performance software, and breakthroughs in deep learning AI algorithms. To meet this task, the present technology provides advanced systems and methods that facilitate autonomous driving functionality, including a platform for autonomous driving Levels 3, 4, and/or 5. In preferred embodiments, the technology provides an end-to-end platform with a flexible architecture, including an architecture for autonomous vehicles that leverages computer vision and known ADAS techniques, providing diversity and redundancy, and meeting functional safety standards. The technology provides for a faster, more reliable, safer, energy-efficient and space-efficient System-on-a-Chip, which may be integrated into a flexible, expandable platform that enables a wide-range of autonomous vehicles, including cars, taxis, trucks, and buses, as well as watercraft and aircraft.

Systems and methods for safe and reliable autonomous vehicles

In various examples, activation criteria and/or braking profiles corresponding to automatic emergency braking (AEB) systems and/or collision mitigation warning (CMW) systems may be determined using sensor data representative of an environment to a front, side, and/or rear of a vehicle. For example, activation criteria for triggering an AEB system and/or CMW system may be adjusted by leveraging the availability of additional information with regards to the surrounding environment of a vehicle&#x2014;such as the presence of a trailing vehicle. In addition, the braking profile for the AEB activation may be adjusted based on information about the presence of and/or location of vehicles to the front, rear, and/or side of the vehicle. By adjusting the activation criteria and/or braking profiles of an AEB system, the potential for collisions with dynamic objects in the environment is reduced and the overall safety of the vehicle and its passengers is increased.

A device comprises a plurality of interface circuits configured for communicating between a semantic processing unit and a memory and a selection circuit for selecting an interface circuit allocated to a semantic processing unit for processing a data operation request in the memory.

Arbiter for array machine context data memory

A device performs lookup functions for a semantic processing unit. The device comprises a plurality of interface circuits for receiving data operation requests from the semantic processing unit. The device comprises a buffer for allocating an interface circuit to a semantic processing unit having a data operation request. A selection circuit, coupled between the plurality of interface circuits and a memory unit, selects an allocated circuit for accessing the memory unit to process the data operation request.

Array machine context data memory

A memory subsystem includes multiple different caches configured for different types of data transfer operations between one or more processing units and a main memory. The different caches can include a first general cache configured for general random memory accesses, a software controlled cache used for controlling cache operations for different processing devices accessing the same data, and a streaming cache configured for large packet data memory accesses. An arbiter may be used for arbitrating requests by the multiple different caches for accessing the main memory.

Contextual memory interface for network processor

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Los Gatos, CA, United States of America

Jonathan Sweedler