Other

University of Ottawa

Jonathan Parri

Daniel Shapiro

Miodrag Bolic

Dong Liang She

Wei Wang

Technologies are generally provided to virtualize hardware acceleration. In some examples, a coprovisor component may be configured to multiplex multiple domains' requests to access a hardware accelerator such as a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a comparable accelerator in a paravirtualized environment. Hyper-requesting may be employed for hardware acceleration virtualization, where a hardware acceleration module concurrently loads a portion of data of a request for a first accelerator application and a portion of data of another request for a second accelerator application and simultaneously processes the two portions of data. Directly situated on a device driver layer, the coprovisor may schedule portions of access requests to the hardware accelerator at the same time through direct memory access (DMA) context switching.

Virtualization of hardware accelerator allowing simultaneous reading and writing

A security interface system creates plausible deniability, and consists of a security interface device having a port for a releasable connection to a PC and to a memory key containing an encrypted operating system, the interface device containing logic to decrypt the memory key and a plaintext bootloader, and a further port for a memory card containing a key. The key is entirely encrypted and appears as random data when inspected. The interface device may have a port(s) for a keyboard and mouse. An encryption and decryption method is described, for decrypting a ciphertext into one of two plaintexts by choice of a key, the choice of which plaintext depending on whether the secret is to be revealed or remain confidential.

Growing community of inventors

Russell, Canada

Jonathan Parri