Sony United Kingdom Limited

Sony Corporation

Other

Jonathan Mark Greenwood

Mark John McGrath

Michael John Ludgate

Andrew Garrett

James Hendrie McIntyre

A solid generator allows multiple identical solids to be produced in respective ones of the tiles of a rectangular array of tiles. The tiles may occupy a whole frame, may be shifted relative to the edges of the frame. One row of tiles may be shifted relative to another row. The array may be passed across the frame. The tiles may occupy a part of the frame. A single ramp is defined by R&equals;Ah&plus;Bv_C where A, B and C are signed values, h&equals;pixels along a line and v&equals;lines. Values of A, B and C for various tiles are stored in registers C , C , C , FB , FB , FB and used in relation to the individual tiles.

Generating multiple ramps

Editing apparatus for editing source video and/or audio material stored on a storage medium to generate an edited material sequence of clips from the source material, comprises: means for defining source files on the storage medium containing data representing the source material to be edited; and means for defining an output file on the storage medium for each edited material sequence, each output file comprising addressing information defining a sequence of storage locations on the storage medium of data within the source files representing the one or more clips of source material forming that edited material sequence.

Editing of recorded material using a virtual file representing an edited clip sequence

Signal generator

A system for generating a variety of solid signals and key signals. The system includes a multiple of solid generators, a multiple of key signal generators and a cross-point switch. Each of the solid generators includes a multiple of solid mixers, and each of the key signal generators includes a multiple of key signal mixers. The cross-point switch is arranged to connect any of the solid generators and key signal generators to any of the switch's main outputs, and to connect any of the solid generators to any of the key generators. The system provides for selection of preset delays to compensate for different signal routings. A timing control controls routing and delay selection.

System for efficiently generating a variety of solid signals and key signals

A wipe pattern comprises a series of horizontal rows, R0-R4. As the wipe proceeds first video Y in a row is replaced by second video X. The wipe proceeds from row to row. The wipe may progress from left to right from the top row to the bottom or from right to left from the bottom row to the top. An alternative wipe pattern comprises vertical rows. In another alternative, the wipe in one row begins before the wipe of the preceding row ends.

A ramp generator for use in a video mixing system to produce various transition effects between edited video frames. The ramp generator produces a ramp signal R according to the equation R&equals;Ah&plus;Bv&plus;C. The ramp signal R corresponds to a video frame comprised of v video lines (where v is an integer from 0 to m), each video line having h pixels (where h is an integer from 0 to n), and where A, B, and C are coefficients. Multiple ramp signals can be combined to a 'solid' signal. Solid signals can be used to generate masks or wipe patterns. Each ramp be edge modulated before combining into a solid signal. A solid signal can also be solid modulated.

Ramp generator

Data storage apparatus having an ordered data array of data items stored on a storage medium, in which deletion of a data item from the array leaves data storage space in which a newly stored data item can be stored, comprises means for storing a mask array on the storage medium, the mask array having a respective mask array data entry for each possible data item position in the stored data array, which is settable to indicate whether a data item is validly stored at that data array position.

Data storage with data masking array, apparatus and method therefor

A video signal processor interpolating lines in a vertical filter (24) in dependence on whether the lines are of a 625 line frame or a 525 line frame. The interpolated lines are filtered in a horizontal filter (26). The resultant lines are vertically and horizontally decimated by controlling the writing of the lines into a FIFO (28). A reduced size image is produced which has the same number of lines and pixels per line for both 525 and 625 line frames. The reduced size image is data compressed in a JPEG codec (50). The compression factor for a 525/60 signal is 6/5 of that for a 625/50 signal so the data rate per unit time is the same for both signals.

Dual standard video signals processor

NTSC signals have a frame rate of 29.97 frames per second. In SDI, audio data is sampled at a rate 30n where n is an integer, e.g. 48K samples per second. Thus there are 1601.6 samples per frame. Although there are an integer number 8008 samples per five frame sequence, two frames have 1601 samples and 3 frames have 1602 samples. This creates a variable storage requirements from frame to frame and causes problems in editing. The SDI audio data is separated from associated video and decimated by a factor h, where h=4 for example in a signal processor 2, 3, 4, 5 and 6. The decimated data is written into a FIFO circuit at the rate 30n/h synchronously with frame timing under the control of a frame reference generator 10, 9. A fixed integer number n/h of samples is written into the FIFO 7 in each frame under the control of a write control circuit 8. n/h=400 for example, where n=1600 and h=4. Any additional sample in each frame is dropped. The 400 sample frames are stored on a disc 14. If it is desired to reproduce the samples, they are written into a FIFO 12. A read control circuit 13 reads the samples out synchronously with the video frame rate. In three frames 400 samples are read out: in two frames 401 samples are read out.

Audio signal processor

Data buffering apparatus comprises a data memory in which input data are written to the memory in contiguous groups at memory addresses defined by a write pointer and data are read from the memory at a memory address defined by a read pointer; and means for writing a dummy group of data at the end of at least some of the input data groups, the dummy groups of data being read from the memory and discarded before a subsequently written input data group is read.

Data buffer using dummy data

A laptop computer 53 has an LCD display 542 which is used to display images represented by data-reduced video signals supplied to it from a buffer 52 of a video signal processor (50, 51, 52, 56, 57). The processor is connected to the computer 53 via an SCSI interface having a test adaptor 55, a bus 556 and a device controller 56. The computer is not synchronised with the video. It processes a frame of image data to display the frame, and then requests another frame asynchronously with the video sync. The video signal processor (50, 51, 52, 56, 57) responds to the request by disconnecting from the bus (556) processing the next frame, and reconnecting to the bus to provide the frame synchronously with video frame sync F. Thus the computer becomes effectively synchronised to the video.

Video display controller

Digital audio data occurs in groups of data samples spaced apart in time. The data rate in the groups is much greater than the audio data sampling rate. The audio data may be embedded in the horizontal blanking interval of a video signal as in SDI. The audio data is extracted (2) from the video signal and the samples stored in a FIFO (3). The FIFO (3) removes the spacing between the groups of samples. Sets of the samples are weighted and summed in a multiplier (4) and accumulator (5). Each set to be weighted and summed is displaced by a preset number of samples relative to the previous set to decimate the audio data.

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Basingstoke, United Kingdom

Jonathan Mark Greenwood