Analog Devices,inc.

Apple Inc.

R2 Semiconductor, Inc.

Jonathan Mark Audy

David Thomson

Gabor Reizik

Richard Redl

Brian P Erisman

A Paul Brokaw

David A Fisher

Trey Roessig

Mark A Yoshimoto

Jamie L Langlinais

Evaldo M Miranda, Jr

Edward Coleman

Rajarshi Paul

Eric Bernard Rodal

Evaldo M Miranda

Damon Lee

Barrie Gilbert

Parin Patel

Franklin Marshall Murden, Ii

Talbott Mead Houk

Michael P Daly

Andrew T K Tang

Eric John Siragusa

A power conversion circuit providing a regulated output voltage to a load can include a switching regulator with an input configured to be coupled to an input voltage source and an output configured to be coupled to the load. The power conversion circuit can further include a metered charge transfer converter, such as a charge pump or a switched or pulsed current source, having an input configured to be coupled to an input voltage source and having an output configured to be coupled to the load. A controller coupled to the metered charge transfer converter can be configured to operate the metered charge transfer converter to deliver energy to the load responsive to a dip of the regulated output voltage below a threshold caused by an increase in current drawn by the load. The metered charge transfer converter may be located closer to the load than the switching regulator.

Metered charge transfer assisted switching regulators

A multi-phase switch mode, voltage regulator has a transient mode portion in which a phase control output is coupled to one or more control inputs of one or more switch circuits that conduct inductor current through one or more transient phase inductors, from amongst a number of phase inductors. A slew mode control circuit detects a high slope and then a low slope in the feedback voltage and, in between detection of the high slope and the low slope, pulses the phase control output of the transient mode portion so that the switch circuit that conducts transient phase inductor current adds power to, or sinks power from, the power supply output. Other embodiments are also described.

Slew mode control of transient phase based on output voltage slope of multiphase DC-DC power converter

Methods, systems and apparatuses for voltage regulation are disclosed. For an embodiment, a voltage regulator includes a power source block configured to convert an input voltage to an output voltage to supply current to an output load, a storage capacitor, and an active filter configured to transfer energy between the output load and the storage capacitor. A conversion ratio of the active filter is controlled by a parameter related to the output voltage, and a conversion ratio of the power source block is at least partially controlled by a parameter related to the voltage on the storage capacitor.

Control of conversion ratios of a power source block and bidirectional active filter

Control of conversion ratios of a power source block and a bidirectional active filter

In an example, a system and method are disclosed for providing a single control law that is operable to regulate both small-signal, steady-state operation, and large-signal transients of a switching regulator. The control law is based on detecting a zero-crossing of capacitor current, and projecting in advance a turning point for either ramping up or ramping down capacitor voltage at a target voltage. Certain embodiments may realize the control function in high-speed analog components, although certain other embodiments may implement the same or a similar control law in a digital controller.

Auto-tuning switching regulator

A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal.

Phased-array charge pump supply

An oscillator synchronization system employs two oscillators, each of which includes an integrator which provides a ramping signal at its output, a comparator which receives the ramping signal and a reference signal at respective inputs and toggles an output when the ramping voltage crosses the reference signal, and a one-shot circuit that generates the integrator's reset signal when triggered. The system is preferably arranged such that the oscillators can be operated independently, in which case each oscillator's one-shot is triggered by its own comparator output, or synchronously, in which case each oscillator's one-shot is triggered by the other oscillator's comparator output&#x2014;with the ramp signal of each oscillator operating to reset the integrator of the other oscillator. The oscillators are typically out-of-phase when synchronized, with the phase difference varying with the magnitude of the reference signals applied to the comparators.

Two oscillator synchronization system

A scalable highest available voltage selector circuit determines the highest of n input voltages and connects the highest voltage to an output. The circuit has at least n circuit branches, each of which comprises n&#x2212;1 'comparator' FETs connected between an input voltage and an output node, and a diode-connected FET connected between the output node and a current source. The junction of the diode-connected transistor and current source provides a control signal used by the other branches. Each of a branch's comparator FETs have their gates connected to a respective one of the other branches' control signals, such that they are driven on regeneratively when the applied input voltage is the highest of the n input voltages. Each branch also includes n&#x2212;1 'shorting' FETs connected across the diode-connected transistor, arranged to be driven off when the applied input voltage is the highest, but which are otherwise driven on.

Scalable highest available voltage selector circuit

A single integrator sensorless current mode control scheme for a switching power converter requires an amplifier circuit which produces an first current that varies with the difference Vbetween a reference voltage and a voltage that varies proportionally with V, a circuit which produces a second current that varies with the voltage Vacross the output inductor, a single integrating element connected to receive the first and second currents such that it integrates both Vand V, and a comparator which receives the integrated output at its first input and a substantially fixed voltage at its second input and produces an output that toggles when the voltage at its first input increases above and falls below the substantially fixed voltage. The comparator output is used to control the operation of the power converter's switching circuit and thereby regulate the output voltage.

Single integrator sensorless current mode control for a switching power converter

A dynamically read fuse cell includes a first circuit which includes a known reference resistance R, and a second circuit which includes a programmed fuse having a resistance R; the state of the programmed fuse is to be read. The first and second circuits receive a common 'read' signal, and are arranged to produce first and second outputs which begin changing state in response; the first and second outputs have respective slew rates which vary with Rand R, respectively. The first and second circuits are interconnected such that causing both outputs to begin changing state in response to the 'read' signal triggers a time domain race condition, the result of which indicates which of the outputs slewed more quickly in response to the &#x201c;read&#x201d; signal, thereby indicating the relationship between Rand Rand, when Ris properly chosen, the state of the fuse.

Dynamically read fuse cell

A communication system includes a master device which communicates with a chain of serially-connected slave devices. The master originates messages, each of which is intended for a particular 'target' slave device. Each message contains a 'distance to target device' value equal to the number of devices between the master and target, and a data packet containing data to be conveyed between the master and target. Each slave device determines if the &#x2018;distance to target device&#x2019; value indicates that it is the target. If not, the slave device increments or decrements the value in real time, with no latency, and transmits the modified message to the next slave device until received by the target device. In one embodiment, the target device may place data in the data packet, and the slave devices are arranged to buffer the data back to the master device.

Serial digital communication system and method

An anti-cross conduction driver control circuit and method prevent the occurrence of race conditions and avoid cross-conduction between series-connected power devices, typically MOSFETs, controlled in accordance with the present invention. Individual state machines are connected across the inputs and outputs of each power device driver, and are arranged to accurately determine when the driver has completed a task requested of it. Each state machine produces a 'lockout' signal based on driver status, which is used to inhibit the operation of the opposite driver under prescribed conditions, and to thereby prevent cross-conduction between the series-connected power devices.

Anti-cross conduction drive control circuit and method

A programmable fuse state determination system and method provide a fuse current through a programmed fuse which produces a voltage that varies with the fuse's resistance. The voltage is compared with a threshold voltage to indicate whether the fuse is blown or intact. The invention employs 'normal' and 'test' modes, in which the relationship between the fuse's resistance and the threshold voltage differ, such that a higher fuse resistance is required for the fuse to be determined blown in the &#x2018;test&#x2019; mode than in the &#x2018;normal&#x2019; mode.

Programmable fuse state determination system and method

A digital blanking circuit allows a first digital input signal transition to be passed on to a following stage, but prohibits the passing of subsequent transitions for a predetermined blanking interval. One embodiment of the present invention employs rising edge and falling edge latches, the inputs of which receive the digital input signal and the outputs of which are connected to a two-to-one multiplexer. The mux output is connected to a blanking interval circuit, which is triggered to begin timing a blanking interval by a multiplexer output transition. The blanking interval circuit provides outputs which control the latches and selects the latch output to be transferred to the multiplexer output such that the multiplexer output is prevented from transitioning during a blanking interval. An 'adaptive' blanking circuit is also described in which the blanking interval is terminated when the transition which triggered the start of the blanking interval propagates through an entire signal path, such that the blanking interval is automatically adjusted to be the same as the signal path delay.

Digital banking circuit

A programmable &ldquo;semi-fusible&rdquo; link system is used to trim one or more circuit parameters. Each semi-fusible link, typically a thin film resistor, has &ldquo;intact&rdquo; and &ldquo;blown&rdquo; states, with the link having a first, non-zero resistance when intact, and a second, higher but finite resistance when blown, which is accomplished by forcing a predetermined current through the link. Each link is connected to a respective active devices which, when turned on, provide the current needed to blow the link. The links are also connected in series with respective current sources, and to respective threshold detectors connected to monitor the current through their respective links. Each threshold detector provides a logic output which indicates whether its link is intact or blown based on the magnitude of the link current. A &ldquo;disable&rdquo; circuit may also be included which, when activated, prevents the further programming of any of the circuit's semi-fusible links.

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Los Gatos, CA, United States of America

Jonathan Mark Audy