Fairchild Semiconductor Corporation

National Semiconductor Corporation

Qspeed Semiconductor Inc.

Jonathan Klein

Rajeev Dinkar Joshi

Venkat Iyer

Rendon A Holloway

Qinghung (Michelle) Lee

Robert A Pease

Mansour Izadinia

Juha-Matti Kujala

James Holt

Juha Joonas Oikarinen

Gabriel Eirea

Morris Tsou

According to one aspect of the present disclosure, there is provided a battery charging system. The battery charging system includes battery charging circuitry configured to provide charging current to a battery. The battery charging system further includes feedback circuitry configured to generate a feedback signal indicative of a battery charging condition, wherein the battery charging system is configured to control the battery charging current based on, at least in part, the feedback signal. The battery charging system further includes feed forward circuitry configured to adjust the feedback signal to decrease battery charging current when a decrease in battery current draw exceeds a threshold, and wherein the feed forward circuitry is configured to decrease the battery charging current faster than the feedback circuitry.

Battery charging system including current observer circuitry to avoid battery voltage overshoot based on battery current draw

This document discusses apparatus and methods associated with an early warning strobe input of a boost converter. In an example, a method of increasing a set point of a boost converter configured to provide power to a mobile device can include receiving an indication that the mobile device will transition from the first low-power mode to a second higher-power mode; and increasing the set point of the boost converter in response to the indication.

Early warning strobe for mitigation of line and load transients

This document provides methods and apparatus configured to efficiently regulate an output voltage near a desired voltage level, for example, under varying input or load conditions. An example apparatus can include a regulator having a boost controller configured to provide voltage to an output of the regulator when at least one of the output voltage or the input voltage is below a first threshold voltage and a buck controller configured to provide voltage to the output of the regulator when at least one of the output voltage or the input voltage is above a second threshold voltage. Further, the regulator can be configured to provide the input voltage at the output of the regulator when at least one of the input voltage or the output voltage is between the first and second threshold voltages. In some examples, the first threshold is below the second threshold.

Buck-boost regulator with converter bypass function

A semiconductor die package capable of being mounted to a motherboard is disclosed. The semiconductor die package includes a substrate, and a first semiconductor die mounted on the substrate, where the first semiconductor die includes a first vertical device comprising a first input region and a first output region at opposite surfaces of the first semiconductor die. The semiconductor die package includes a second semiconductor die mounted on the substrate, where second semiconductor die comprises a second vertical device comprising a second input region and a second output region at opposite surfaces of the second semiconductor die. A substantially planar conductive node clip electrically communicates the first output region in the first semiconductor die and the second input region in the second semiconductor die. The first semiconductor die and the second semiconductor die are between the substrate and the conductive node clip.

Semiconductor die package including multiple dies and a common node structure

A hysteretic DC-DC converter includes an observer circuit configured to generate an observer control signal for injection into the control loop of the converter. The observer circuit may be configured to differentiate the output voltage of the converter to generate a differentiated output voltage. A transconductance amplifier may be configured to output the observer control signal from the differentiated output voltage. The observer control signal may be injected into the control loop in a summing node.

Circuits and methods for improving transient response of hysteretic DC-DC converters

In one embodiment, a soft start circuit includes a slew rate controller to limit inrush current to a voltage regulator during start up. The output voltage of the regulator may be compared to a previous sampled value to determine the slew rate of the output voltage. The slew rate of the output voltage may be controlled by adjusting the current limit of the regulator. The current limit of the regulator may be adjusted using digital circuits, such as a counter and a digital to analog converter, or analog circuits using a pulsed current source, for example. The slew rate may be controlled to exceed a target slew rate or to stay within a range of slew rate limits.

Soft start circuit with slew rate controller for voltage regulators

In one embodiment, in a power converter system having first and second switches connected in a half-bridge arrangement at a common node from which current flows through an inductor to a regulated output terminal, wherein the regulated output terminal is connectable to a load, wherein the first and second switches are turned on and off in cycles, a method is provided for synchronous rectification. The method includes: initiating a cycle in which the first switch is turned on; developing a timer based on the on-time of the first switch during the cycle; turning off the first switch and turning on the second switch during the cycle; and outputting a control signal to turn off the second switch when either the timer expires or a new cycle is initiated to turn on the first switch, thereby providing synchronous rectification in the power converter system.

Time-based synchronous rectification in a power converter

In one embodiment, a method for a control interface includes: receiving a signal conveying bits of information over a single line; and for each bit of information, comparing the proportion of time that the signal on the single line is low versus the proportion of time that the signal on the single line is high for a respective bit period defined from one operative edge of the signal to the next operative edge of the signal in order to determine a logic value for that bit of information.

Control interface and protocol

According to an embodiment of the present invention, a method is provided for hysteretic control of a DC-to-DC power converter system having first and second switches connected in a half-bridge arrangement at a common node and through an inductor to a regulated output terminal, wherein the regulated output terminal is connectable to an output capacitor and a load. The method includes the following: generating a feedback signal which tracks current flowing through the inductor; comparing the feedback signal against a reference voltage to generate a control signal; and controlling the magnitude of an output voltage which appears at the regulated output terminal in response to the control signal, thereby providing hysteretic control of the DC-to-DC converter which is not dependent on an equivalent series resistance (ESR) of the output capacitor.

Power converter with hysteretic control

A composite field effect transistor, in accordance with one embodiment, includes a zener diode, a junction field effect transistor and a metal-oxide-semiconductor field effect transistor. A gate of the junction field effect transistor is coupled to an anode of the zener diode. A cathode of the zener diode is coupled to a gate of the metal-oxide-semiconductor field effect transistor. A drain of the metal-oxide-semiconductor field effect transistor is coupled to a source of the junction field effect transistor.

Composite field effect transistor

An integrated circuit is disclosed having a thermal shutdown capability. A single chip bonding pad is coupled to a circuit that will operate the bonding pad at a low potential for normal conditions and will pull it high when a temperature threshold is crossed. Thus, the normally low bonding pad provides a temperature flag. The bonding pad is also coupled to a latch that will hold it high and to a lockout circuit that acts to disable the heat producing chip circuitry. Therefore, when the bonding pad is once driven high the circuits are locked out and will remain out until a start up command is present. This is achieved by either momentarily removing the power supply or by pulling the bonding pad low. Both manual and computer control of the circuit is disclosed.

Growing community of inventors

Palo Alto, CA, United States of America

Jonathan Klein