Tokyo Electron Limited

University of California

Georgia Tech Research Corporation

Wayne State University

Jonathan Hollin

Subhadeep Kal

Matthew Flaugh

Andrew C Kummel

Charles H Winter

Aelan Mosden

Muhannad S Bakir

Yu-Hao Tsai

Pingshan Luan

Hamed Hajibabaeinajafabadi

Victor Wang

Nyi Myat Khine Linn

Mike Breeden

Ming-Jui Li

A surface of a substrate is modified, where the substrate includes at least two different layers or films of different materials. The modified layer is then selectively converted to a protection layer on one of the layers, while the other layer is etched.

Surface modification to achieve selective isotropic etch

Selective protection and etching is provided which can be utilized in etching of a silicon containing layer with respect to a Ge or SiGe layer. In an example, the layers are stacked, and an oxide is on a side surface of the layers. A treatment is utilized to provide a modified surface or termination surface on side surfaces of the Ge/SiGe layers, and a heat treatment is provided after the gas treatment to selectively sublimate layer portions on side surfaces of the Si containing layers. The gas treatment and heat treatment are preferably in non-plasma environments. Thereafter, a plasma process is performed to form a protective layer on the Ge containing layers, and the Si containing layers can be etched with the plasma.

Selective and isotropic etch of silicon over silicon-germanium alloys and dielectrics; via new chemistry and surface modification

Methods of bonding and structures with such bonding are disclosed. One such method includes providing a first substrate with a first electrical contact; providing a second substrate with a second electrical contact above the first electrical contact, wherein an upper surface of the first electrical contact is spaced apart from a lower surface of the second electrical contact by a gap; and depositing a layer of selective metal on the lower surface of the second electrical contact and on the upper surface of the first electrical contact by a thermal Atomic Layer Deposition (ALD) process until the gap is filled to create a bond between the first electrical contact and the second electrical contact.

Methods of forming stacked integrated circuits using selective thermal atomic layer deposition on conductive contacts and structures formed using the same

Growing community of inventors

Albany, NY, United States of America

Jonathan Hollin