Microsoft Technology Licensing, LLC

Amazon Technologies, Inc.

Jonathan David Morrison

Andrew James McNamara

Matthew Mitchell Dixon

Mahmoud Adada

Soroush Mehri

Mohamed Musbah

Geoffrey Jacoby Gordon

Parag Kumar Garg

Neill Michael Clift

Douglas Matthew Booms

Arun Upadhyaya Kishan

Barry Clayton Bond

Shankar Pal

Hoi Huu Vo

Baskar Sridharan

Mark Connolly Benvenuto

Stanislav A Oks

Abdelsalam Heddaya

Anthony J Lorelli

Dragan Tomic

Spencer Dean Perreault

Mujtaba S Khambatti

John Austin Rector

Eduardo A Cuervo Laffaye

Robert Binneweg Francis

Tristan P K Schmelcher

Andrew James Mcnamara

This document relates to techniques for addressing disruptions that prevent applications from receiving user input, prevent users from providing input to an application, and/or prevents or impacts users from receiving application output. One example method involves detecting a disruption to an interactive application during interaction by a user with the interactive application, generating automated user inputs, and providing the automated user inputs to the interactive application during the disruption to the interactive application.

Providing automated user input to an application

Providing automated user input to an application during a disruption

A server computing device for inducing latency on target input streams is provided. The server computing device includes a processor configured to receive a plurality of input streams from a respective plurality of client computing devices. Each input stream includes a plurality of inputs controlling actions of respective characters in a multiplayer online software program. The processor is further configured to determine a latency of each of the input streams, identify a higher latency input stream and a lower latency input stream among the plurality of input streams, and induce a higher latency in the lower latency input stream to narrow a difference in latency between the higher latency input stream and the lower latency input stream.

Inducing higher input latency in multiplayer programs

Systems and methods for virtualizing audio decoding hardware of a guest audio decoder are disclosed. A method may include storing received encoded audio in main memory of a host computing device. An operation to access a register or memory of the audio decoding hardware of the guest audio decoder may be intercepted. The register or memory has an associated address in the main memory of the host computing device. The intercepted operation can include a register WRITE operation, and can be translated into an operation associated with accessing dedicated decoder memory of a host audio decoder of the host computing device.

Virtualizing audio decoding hardware

Multi-dimensional gesture input to a computing device can be improved by providing a mechanism to lock or reduce the effects of motion in unintended directions. In one example, a user can navigate in two dimensions, then provide a selection action through motion in a third dimension. If a computing device analyzing the gesture is able to detect the selection action, the device can limit motion outside the corresponding third dimension in order to ensure that the proper selection action is performed. Various thresholds, values, or motions can be used to limit motion in one or more axes for any appropriate purpose as discussed herein.

Navigation approaches for multi-dimensional input

A system and method for using asynchronous changes to memory to detect malware is disclosed. The technology initially receives a memory buffer location to be evaluated, the memory buffer location possibly having at least a portion of malware therein. The technology then performs a plurality of double fetches to the memory buffer location. The technology additionally compares a plurality of responses to the plurality of double fetches, wherein a plurality of similar responses to the plurality of double fetches indicates the portion of malware is not present and wherein at least two distinct responses to the plurality of double fetches indicates the portion of malware is present.

Using asynchronous changes to memory to detect malware

Process reflection techniques are described in which a reflected process is created to facilitate analysis of a process. Events are detected to initiate reflection of a target process. Process reflection of a target process may be initiated by an external process or by the target process itself. A reflected process of the target process is created. In an implementation, data defining the target process is replicated, copied, or otherwise collected from the target process to create the reflected process. Then, analysis may be performed on the reflected process while execution of the target process continues.

Process reflection

A blocking local sense synchronization barrier is provided. The local sense variable is not processor private or global, but truly local to the synchronization barrier function. Safe deletion is provided by making sure the last operation a thread performs on a barrier is a write. Just before returning, threads increment a field that indicates the count of threads that have left the barrier. Blocking is supported such that threads spin for some interval, and when they decide to block, examine and set (if not already set) the indication of whether a thread is blocking that is to be examined by the last thread to arrive at the barrier to determine whether to set an event to release blocking threads.

Blocking local sense synchronization barrier

Caching architecture that facilitates translation between schema data and relational structures. A schema translation component consumes schema data (e.g., XML schema data) having a schema structure. The schema structure is shredded into tables. A validation component interfaces to a memory management interface to facilitate loading only the necessary components to perform instance validation. During validation, only parts of the schema that are used are loaded and cached. A schema cache stores the in-memory representation of the schema optimized for instance validation. The schema components are loaded from metadata into the cache memory as read-only objects such that multiple users can use the in-memory objects for validation.

Memory cache management in XML/relational data mapping

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North Bend, WA, United States of America

Jonathan David Morrison