Bae Systems Information and Electronic Systems Integration Inc.

Samsung Electronics Co., Ltd.

Ovonyx Inc.

Jonathan D Maimon

Murty S Polavarapu

Stephen J Hudgens

Hideki Horii

Soon-Oh Park

Dong-ho Ahn

Hee-Ju Shin

Nadim F Haddad

Young-Hyun Kim

Jin-ho Oh

Leonard Richard Rockett

Carl Schell

Scott Doyle

Charles N Alcorn

Orlee Maimon

Wallet with twist fold open

A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by SnSbTeor, alternatively with substitutions, in whole or in part, of silicon and/or indium for tin, arsenic and/or bismuth for antimony, and selenium for tellurium; and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer. Here, 0.001&#x2266;X&#x2266;0.3, 0.001&#x2266;Y&#x2266;0.8, 0.1&#x2266;Z&#x2266;0.8, and X+Y+Z=1.

Non-volatile memory device including phase-change material

A method for forming a resistor includes causing a semiconductor layer to have a first resistance, forming a first mask on the semiconductor layer, causing portions of the semiconductor layer left exposed by the first mask to have a second resistance that is lower than the first resistance, forming a second mask on the first mask and on the semiconductor layer, removing portions of the first mask and the semiconductor layer left exposed by the second mask, removing the second mask, and causing portions of the semiconductor layer exposed by the removing of the second mask to have a third resistance that is lower than the second resistance. Because a resistor formed by such a process can include an aligned body and contact, it often occupies a smaller area than prior integrated resistors having a similar resistance value.

Method for forming an interated resister having aligned body and contact

A method for fabricating resistors within a semiconductor integrated circuit device is disclosed. A resistor is fabricated by first depositing a passivation layer on a semiconductor substrate having multiple transistors previously formed thereon. Next, a first contact window and a second contact window are formed through the first passivation layer at a first contact location and a second contact location, respectively. The first and second contact windows are then filled with metal, such as tungsten, and the metal at the first and second contact windows is planarized to form a first bottom contact and a second bottom contact, respectively. A resistive film, such as polysilicon, subsequently deposited over the first passivation layer. Next, a second passivation layer is formed over the resistive film. Finally, a first top contact and a second top contact are formed to respectively connect the first bottom contact and the second bottom contact to the resistive film.

Method for fabricating resistors within semiconductor integrated circuit devices

An integrated resistor includes a resistor body region and a resistor contact region that is aligned with the body region. Because the resistor includes an aligned body and contact, it often occupies a smaller area than prior integrated resistors having a similar resistance value. A method for forming such a resistor is also disclosed.

Integrated resistor having aligned body and contact and method for forming the same

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Manassas, VA, United States of America

Jonathan D Maimon