Fairchild Semiconductor Corporation

Jonathan A Noquil

Rajeev Dinkar Joshi

Consuelo N Tangpuz

Yong Liu

Chung-Lin Wu

Seung Yong Choi

Romel Nogas Manatad

Maria Cristina Estacio

Maria Cristina B Estacio

Ruben P Madrid

Venkat Iyer

Jocel P Gomez

Stephen Martin

Connie Tangpuz

Jocel Gomezl

An integrated power device module including a lead frame having first and second spaced pads, one or more common source-drain leads located between the first and second pads, and one or more drain leads located on the outside of the second pad. First and second transistors are flip chip attached respectively to the first and second pads, wherein the source of the second transistor is electrically connected to the one or more common source-drain leads. A first clip is attached to the drain of the first transistor and electrically connected to the one or more common source-drain leads. A second clip is attached to the drain of the second transistor and electrically connected to the one or more drain leads located on the outside of the second pad. Molding material encapsulates the lead frame, the transistors, and the clips to form the module.

Dual side cooling integrated power device module and methods of manufacture

A semiconductor package assembly including a molded leadless package (MLP) having an exposed top emitter pad and an exposed bottom source pad. A folded heat sink is attached to the exposed top emitter pad of the MLP by a soft solder attach process. The folded heat sink has a planar member generally coextensive in size with the MLP and in electrical and thermal contact with the top emitter pad of the MLP, and also has one or more leads extending generally perpendicularly to the planar member in a direction towards the lower surface of the MLP. These heat sink leads may provide the emitter connection to a printed circuit (PC) board.

Flip chip MLP with folded heat sink

An integrated transistor module includes a lead frame that defines at least one low-side land and at least one high-side land. A stepped portion of the lead frame mechanically and electrically interconnects the low-side and high-side lands. A low-side transistor is mounted upon the low-side land with its drain electrically connected to the low-side land. A high-side transistor is mounted upon the high-side land with its source electrically connected to the high-side land.

Integrated transistor module and method of fabricating same

A semiconductor die package is disclosed. In one embodiment, the semiconductor die package has a substrate. It includes (i) a leadframe structure including a die attach region with a die attach surface and a lead having a lead surface, and (ii) a molding material. The die attach surface and the lead surface are exposed through the molding material. A semiconductor die is on the die attach region, and the semiconductor die is electrically coupled to the lead. The die attach surface and the lead surface can be in different planes.

Substrate based unmolded package

An integrated power device module having a leadframe structure with first and second spaced pads and one or more common source-drain leads located between said first and second pads, first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads, and a first clip attached to the drain of said first transistor and electrically connected to said one or more common source-drain leads. In another embodiment a partially encapsulated power quad flat no-lead package having an exposed top thermal drain clip which is substantially perpendicular to said with a folded stud exposed top thermal drain clip, and an exposed thermal source pad.

Dual side cooling integrated power device package and module with a clip attached to a leadframe in the package and the module and methods of manufacture

A multichip module package uses bond wire with plastic resin on one side of a lead frame to package an integrated circuit and flip chip techniques to attach one or more mosfets to the other side of the lead frame. The assembled multichip modulehas an integrated circuit controlleron a central die pad. Wire bondsextend from contact areas on the integrated circuit to outer leadsof the lead frame. On the opposite, lower side of the central die pad, the sources and gates of the mosfetsare bump or stud attached to the half etched regions of the lead frame. The drainsof the mosfets and the ball contactson the outer leads are soldered to a printed circuit board.

Method of assembly for multi-flip chip on lead frame on overmolded IC package

A semiconductor die package is disclosed. It may include a semiconductor die having a first surface and a second surface, and a leadframe structure. A molding material may be formed around at least a portion of the die and at least a portion of the leadframe structure. A solderable layer may be on the exterior surface of the molding material and the first surface of the semiconductor die.

Method to manufacture a universal footprint for a package with exposed chip

A carrier for use in a semiconductor die package is disclosed. In one embodiment, the carrier includes a die attach region and an edge region. A solder mask is on the edge region.

Growing community of inventors

Surigao del Sur, Philippines

Jonathan A Noquil