International Business Machines Corporation

Globalfoundries Inc.

Lenovo (singapore) Pte. Ltd.

Jonas R Weiss

Thomas E Morf

Roger F Dangel

Thomas J Brunschwiler

Bert Jan Offrein

Marcel A Kossel

Stefano Sergio Oggioni

Martin L Schmatz

Bruno Michel

Harry S Barowski

Andreas Huber

Stephan Paredes

Hubert Harrer

Tim Niggemeier

Jochen Supper

Norbert M Meier

Antonio La Porta

Thomas Helmut Toifl

Thomas Pflueger

Robert Dean Lovchik

Nikolaj Moll

Daniel S Jubin

Matthias Fertig

Emmanuel Delamarche

Brian Michael Kerrigan

Heike E Riel

Michael Raymond Miller

Alessandro Sorniotti

Troy James Beukema

Patrick Ruch

Yuksel Temiz

Lukas Kull

Tobias Lamprecht

Thilo Hermann Stoeferle

Julia Hesse

Mechanisms for verifying a captured digital image are provided. A verifier computing system generates, in response to a request to perform digital identity verification of a subject, a computer readable first encoded pattern. Light projecting equipment of the verifier computing system, projects the first encoded pattern onto a physical surface associated with the subject. Digital image capturing equipment of a prover computing system captures a digital image of the subject while the first encoded pattern is projected onto the physical surface such that the captured digital image captures both an image of the subject and the projected first encoded pattern. The prover computing system generates a second pattern based on an extraction key received from the verifier computing system. The prover computing system verifies an authenticity of the captured digital image based on a matching of the second pattern to the first pattern.

Authentication of images based on projected encoded pattern

A sensor comprises a microfabricated chip having a surface with one or more cavities formed thereon, the cavities including sensing components, one or more lids, each covering said surface so as to close at least one of said cavities, the lids contacting rims that delimit said cavities on said surface. Electric circuit portions join, each, a respective one of the lids, to allow the lids to be partly dissolved, electrochemically, responsive to being exposed to an electrochemical solution. In addition, masking material portions cover peripheral regions of the lids at the level of the rims, so as to seal the lids and shield such peripheral regions from said electrochemical solution, in operation. Related apparatuses and sensing methods may be provided.

Biosensors with programmable sensing cavities

Technology for managing objects. A method is applied to a set of objects, for example, in view of commissioning such objects. The method includes patterning a surface of each object of a set of objects to be managed. The patterning is accomplished by using hard particles to make indentations in a surface of each object of the set of object, with the pattern formed on each object being a unique physical fingerprint that can be used to identify the object when performing various manage method(s) on the objects.

Mechanically stamped unique features for authenticity and provenance tracking

An electrostatic discharge (ESD) protection circuit for providing ESD protection to an ESD protected circuit. The protection circuit comprises a signal pad and a crossover network for separating wanted electrical data signals and ESD signals according to their frequency. The protection circuit further comprises a first branch configured to transmit at least a spectral part of the wanted electrical data signals between the signal pad and the ESD protected circuit and a second branch configured to receive the ESD signals from the signal pad. Additionally there is provided a corresponding method, a corresponding integrated circuit chip and a corresponding design structure.

ESD protection circuit

The invention relates to a wafer prober including an optical waveguide, the optical waveguide having a first optical coupling end segment with a first optical coupling surface being devoid of cladding. The first optical coupling end segment being configured to provide an adiabatic optical coupling to a second optical coupling end segment of a second optical waveguide of a photonic integrated circuit on a semiconductor wafer when the optical waveguide is aligned with respect to the semiconductor wafer according to a set of alignment requirements. The second optical coupling end segment having a second optical coupling surface that is devoid of cladding. The second optical coupling surface is parallel to a wafer surface of the semiconductor wafer. An alignment system configured to align the optical waveguide with respect to the semiconductor wafer according to the set of alignment requirements.

Wafer prober for testing in-wafer photonic integrated circuits

A distributed electrostatic discharge protection circuit includes a plurality of electrostatic discharge protection elements and a current balancing network connecting the plurality of electrostatic discharge protection elements. The current balancing network is configured in a return path of the distributed electrostatic discharge protection circuit such that during an electrostatic discharge (ESD) event, the circuit provides predefined current density within each of the electrostatic discharge protection elements.

Distributed electrostatic discharge protection circuit with magnetically coupled differential inputs and outputs

Embodiments include a method for interconnecting components of an optical circuit. The method includes arranging the components on a support layer and embedding them within a material, such that portions of the material that is between the components contact the support layer. The obtained components are positioned with a certain inaccuracy with respect to ideal nominal positions thereof. Next, the support layer is removed to reveal one side of the components, on which side the components are level with said portions of said material. Positions of the components are identified and a set of optical polymer waveguides are adaptively fabricated, on the one side, so as for each of the fabricated polymer waveguides to optically connect subsets of two or more of the components, according to the identified positions of the components. The present invention is further directed to related optical circuits or electro-optical circuits of interconnected components.

Adaptive optical interconnection of components of an electro-optical circuit

A computer program product or hardware description language ('HDL') design structure in a computer-aided design system for generating a functional design model of an integrated circuitry structure including generating a functional representation of at least first and second regions of the integrated circuitry structure, generating a functional representation of an optical layer comprising optical waveguides, and generating a functional representation of a heat-conductive material for transferring heat from at least the second region through the optical layer to a heat sink.

Transferring heat through an optical layer of integrated circuitry

A computer program product for fabricating an optical assembly having stored computer readable program code including a first program to place a flexible portion of a substrate including a waveguide, the waveguide exposed at one end edge of the substrate upon a horizontally movable stage of a flip-chip bonder, a second program to vertically move a clamp through the stage opening to place the waveguide exposed end in a vertical position, a third program to vertically downwardly move a bond head containing an optical component upon the waveguide exposed substrate edge to position the optical component with the exposed waveguide, a fourth program to fixably mount the optical component to the substrate edge, and a fifth program to release the optical component from the bond head while moving the clamp vertically downward through the stage opening unbending the flexible portion of the substrate with the optical component mounted thereon.

Computer program product for electro-optical assembly

A system comprises an interposer positioned between an integrated circuit and a system planar. An electrical/optical transceiver is coupled to the interposer, wherein the electrical/optical transceiver converts electrical signals into optical signals. The interposer comprises a first set of electrical conductors that is electrically coupled to non-Input/Output (I/O) electrical connectors on the integrated circuit, and wherein the first set of electrical conductors passes through the interposer to directly connect the non-I/O electrical connectors on the integrated circuit to the system planar. The interposer further comprises a second set of electrical conductors that is electrically coupled to input/output (I/O) electrical connectors on the integrated circuit, wherein the second set of electrical conductors traverses through the interposer to the electrical/optical transceiver to convert electrical I/O signals from the integrated circuit into optical I/O signals.

Optical interconnection to an integrated circuit

Embodiments provide a horizontally movable stage, with an opening, of a flip-chip bonder, a substrate including at least one flexible portion and a waveguide, the waveguide exposed at one end edge of the substrate positioned upon the stage with the end edge over the opening, a vertically upwardly movable clamp sized to penetrate the stage opening and positioned underneath the stage, a vertically downwardly movable bond head above the stage opening, an optical component positioned in the head, a glue dispenser positioned to provide glue to either a mating surface of the substrate exposed end edge or a mating surface of the optical component, and a controller connected to the stage, clamp, head and dispenser, including a control circuit for positioning the substrate waveguide exposed end edge underneath the optical component while dispensing glue for fixably bonding the mating surfaces of the optical component and the substrate exposed end edge.

Fabricating an optical assembly

An integrated circuitry structure includes at least first and second regions. An optical layer includes optical waveguides. A heat-conductive material transfers heat from at least the second region through the optical layer to a heat sink.

A method in a computer-aided design system for generating a functional design model of an integrated circuitry structure including generating a functional representation of at least first and second regions of the integrated circuitry structure, generating a functional representation of an optical layer comprising optical waveguides, and generating a functional representation of a heat-conductive material for transferring heat from at least the second region through the optical layer to a heat sink.

An integrated circuit coupling device includes an integrated circuit package; and an optical data transmission medium connected to the integrated circuit package, and comprising a movable coolant, adapted to remove heat from the integrated circuit package, in operation.

Growing community of inventors

Zurich, Switzerland

Jonas R Weiss