Semtech Corporation

Jonah Edward Nuttgens

James Stephen Mason

Andrew Hana

Circuitry for testing an integrated capacitor that includes a first capacitor, a supply node for connecting to a voltage supply, a test node for connecting to the integrated capacitor, and a charge monitoring circuit. The circuitry is operable in a sequence of states including a first state in which the first capacitor is connected to the supply node and is disconnected from the test node so as to charge the first capacitor to a test voltage and a second state in which the first capacitor is disconnected from the supply node and is connected to the test node to apply the test voltage to the integrated capacitor. The charge monitoring circuit is configured to monitor a charge transfer from the first capacitor to the integrated capacitor in said second state and to generate a measurement value based on an amount of the charge transfer.

Testing an integrated capacitor

An integrated circuit has a CMOS signal path coupled for receiving a data signal. A compensation circuit is coupled to a power supply rail of the CMOS signal path for injecting a compensation current into the power supply rail. The compensation circuit can be a charge pump operating in response to the data signal to inject the compensation current into the power supply rail each transition of the data signal. The compensation circuit can be a replica CMOS signal path to inject the compensation current into the power supply rail each transition of the data signal. The compensation circuit can be a voltage regulator and current mirror including an input coupled to the voltage regulator. The replica CMOS signal path receives an operating potential from the voltage regulator. An output of the current mirror injects the compensation current into the power supply rail each transition of the data signal.

Feed-forward current compensation for CMOS signal path

The application describes a transimpedance amplifier circuit having a first circuit branch extending between first and second supply nodes. An input NMOS transistor is located in the first circuit branch, with its drain terminal coupled to the first supply node via a load resistor, its source terminal coupled to the second supply node and its gate terminal coupled to an input node for receiving an input signal. The circuit includes a PMOS transistor having its source terminal coupled to a third supply node, its drain terminal coupled to the first circuit branch, at a node in a part of the first circuit branch extending from the drain terminal of the input transistor to the load resistor, and its gate terminal coupled to the input node. A drain current of the PMOS transistor contributes a proportion but not all of a drain current for input NMOS transistor.

Transimpedance amplifiers

A photodiode current comparison circuit has a first current source coupled to a circuit node configurable to operate in a first mode, a second current source coupled to the circuit node configurable to operate in a second mode opposite the first mode, and a third current source switchable to route a current to the circuit node in response to a data signal using a transistor coupled between the circuit node and the third current source. A photodiode is coupled to the circuit node. In a first configuration, an anode of the photodiode is coupled to the circuit node and a cathode of the photodiode is coupled to a power supply terminal. In a second configuration, a cathode of the photodiode is coupled to the circuit node and an anode of the photodiode is coupled to a power supply terminal. An amplifier provides an error signal of the photodiode.

Configurable laser monitor photodiode in optical modulation amplitude controller

A driver circuit has a plurality of transistors in a cascode arrangement. A passive biasing circuit is coupled to a gate terminal of a first transistor of the plurality of transistors. The passive biasing circuit has a first resistor coupled to a circuit node to provide a first biasing signal, a first capacitor coupled between the circuit node and a power supply conductor, a second resistor coupled between the circuit node and a drain terminal of the first transistor, and a third resistor coupled between the circuit node and a source terminal of the first transistor. A second transistor has a gate terminal coupled for receiving a data signal which controls an optical device.

Passive dynamic biasing for MOSFET cascode

An OMA controller circuit utilizes a first ADC with an input coupled for receiving a residual error signal indicating a difference between a monitoring signal and a target data signal. A second ADC has an input coupled for receiving the target data signal. A first digital filter has an input coupled to an output of the first ADC, and a second digital filter has an input coupled to an output of the second ADC. A digital multiplier has a first input coupled to an output of the first digital filter and a second input coupled to an output of the second digital filter. An integrator has an input coupled to an output of the digital multiplier and an output providing an average error signal with sign and magnitude. The digital multiplier uses a four quadrant multiplier to perform a cross-correlation on the residual error and the target data signal.

Digital implementation of closed loop optical modulation amplitude controller for laser diode

Systems and methods are provided for a low frequency AC comparison circuit. The low frequency AC comparison circuit includes circuitry configured to receive a monitoring signal generated by an optical detector, the monitoring signal being proportional to an amount of light generated by an optical transmission device that transmits based on a data signal that is received by an optical driver. The comparison circuit is further configured to generate a modulation current control signal that is transmitted to the optical driver based on a comparison of a low frequency AC component of the monitoring signal and a correlated low frequency AC component of the data signal.

Closed loop optical modulation amplitude control

Systems and methods are provided for an optical modulation feedback circuit. The feedback circuit includes a low frequency comparison circuit configured to receive a monitoring signal generated by an optical detector, the monitoring signal being proportional to an amount of light generated by an optical transmission device that transmits based on a data signal that is received by an optical driver. The comparison circuit is further configured to generate a modulation control feedback signal that is transmitted to the optical driver based on a comparison of a low frequency component of the monitoring signal and a low frequency component of the data signal.

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Southampton, United Kingdom

Jonah Edward Nuttgens