Raytheon Company

Jon J Nagareda

Sam S Nishikubo

Christopher S Jones

A time shared histogram chip (80) implemented in a system for manipulating video signal data. The system includes a processor (82) for controlling system operation and for processing a video signal input into the system. The time shared histogram chip (80) accumulates video signal data in a format readable by the processor (82). The histogram chip (80) is operative to perform histogramming, video line summing and video line grabbing functions. Control means (100) is operatively connected to the processor and enables the processor (82) to selectively control the mode of operation of the histogram chip (80).

Histogram chip for line summing, line grabbing and histogramming in a

A data compression system for use in thermal imaging systems. The data compression system includes a memory (74) for receiving an input video signal. Hardware loader (100) loads the video signal into the memory (74). A system processor (84) controls loading of the input video signal by the hardware loader (100) into the memory (74). A histogram chip (80) determines useful data contained in the video signal input into the memory (74). The processor (84) reads information from the histogram chip (80) and compresses the video signal as a function of information read from the histogram chip.

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Palo Alto, CA, United States of America

Jon J Nagareda