International Business Machines Corporation

Jon H Peterson

John Clarence Endicott

Richard G Mustain

Peter Joseph Heyrman

Stephen A Dahl

R Karl Kirkman

Elliot Karl Kolodner

Glen R Mitchell

Lawrence Dean Whitley

Robert Carl Seemann

A computer system, program product, and method of collecting interned data utilize an interned indicator for an internable data element that indicates whether such a data element is in fact interned within an intern data structure. By maintaining this information, iteration completely through the intern data structure during collection may be avoided, thereby reducing the overhead and improving the efficiency of the collection process. In addition, a computer system, program product, and method of collecting interned data may also determine during a second stage of a collection cycle whether an interned data element, which was determined to be unreachable during a first stage of the collection cycle, has subsequently been accessed through an intern data structure since the beginning of the first stage of the collection cycle. By making this determination, interned data that has been made reachable as a result of an access through the intern data structure that occurs after the beginning of the first stage of the current collection cycle is prevented from being collected.

Computer system, program product and method of collecting interned data

A data processing system includes at least one processor and data storage containing an array including N records having value-ordered entries. To find an entry matching a search value, W, a number of records to be searched, is set equal to N, and each of the W records is assigned to either a first set or a second set, where the first set includes X/2 of the W records and X is a smallest power of 2 equal to or greater than W. In response to a determination that the search value precedes the first record within the second set, a binary search of the first set of records is performed to identify a record including an matching entry. If the first entry of the first record within the second set matches the search value, the first record within the second set is identified. However, if the search value follows the first entry of the first record of the second set, the selected record is identified as containing an entry matching the search value only if W is equal to 1, and if W is not equal to 1, W is reset equal to a number of records within the second set and the above steps are repeated until a record containing a matching entry is identified. Following identification of the search value, at least one entry is retrieved from the identified record and contents of the at least one entry are processed within a processor.

Method and system for searching an array for an array value

A method and data processing system for emulating a program are disclosed. According to the present invention, the data processing system runs under a first operating system and emulates the execution of a program under a second operating system within a second data processing system. The data processing system includes a memory which stores at least a portion of the first operating system and an emulator comprising a plurality of routines which each emulate an instruction utilized by the first operating system. The memory further includes a simulated mass storage data area which stores at least a portion of the program and a simulated main memory data area. The data processing system further includes a processor which executes instructions within the program under the first operating system by emulation. According to the present invention, the emulator accesses instructions of the program directly from the simulated mass storage data area to minimize emulation overhead. According to a second aspect of the present invention, the data processing system further includes a cache memory comprising a number of cache lines. The routines are stored within main memory such that when the routines are mapped into the cache, a first instruction within each of the emulation routines is aligned with a different one of the cache lines. According to a third aspect of the present invention, when executing instructions within a routine of a first emulated instruction, the processor prefetches a second emulated instruction prior to completion of the first emulated instruction.

Method and system for handling interrupts during emulation of a program

Method and data processing system for emulating a program

In a processor having a real address space larger than its virtual address space, all of the physical memory is addressed by using a separate prefix register associated with each of the address registers to hold both a high-order address portion and a control bit specifying whether the address is to be translated or used as a direct real address.

Directed address generation for virtual-address data processors

Growing community of inventors

Rochester, MN, United States of America

Jon H Peterson