Memc Electronic Materials, Inc.

Other

Jon A Rossi

Gregory M Wilson

Charles C Yang

Lance G Hellwig

Michael John Ries

A holster which obscures presence and identity of the handgun held by the holster is disclosed. The holster comprises an L-shaped frame having a pin. The handgun is installed on the holster by inserting the pin into the barrel of the handgun. The L-shaped frame combined with the installed handgun collectively form a parallelepiped of thickness equal to that of the handgun. The handgun is disguised by visually meshing in complementary fashion with the holster, when concealed beneath a fabric of an article of apparel.

Self-disguising holster

A wafer is characterized in that the wafer has a non-uniform distribution of crystal lattice vacancies, wherein the concentration of crystal lattice vacancies in the bulk layer are greater than the concentration of crystal lattice vacancies in the front surface layer. In addition, the front surface of the wafer has an epitaxial layer, having a thickness of less than about 2.0 &#xe7;m, deposited thereon. A process comprises heating a surface of a wafer starting material to remove a silicon oxide layer from the surface and depositing an epitaxial layer onto the surface to form an epitaxial wafer. The epitaxial wafer is then heated to a soak temperature of at least about 1175C. while exposing the epitaxial layer to an oxidizing atmosphere comprising an oxidant, and the wafer is cooled at a rate of at least about 10C./sec.

Epitaxial silicon wafer with intrinsic gettering and a method for the preparation thereof

This invention is directed to a novel a single crystal silicon wafer. In one embodiment, this wafer comprises: (a) two major generally parallel surfaces (i.e., the front and back surfaces); (b) a central plane between and parallel to the front and back surfaces; (c) a front surface layer which comprises the region of the wafer extending a distance of at least about 10 &mgr;m from the front surface toward the central plane; and (d) a bulk layer which comprises the region of the wafer extending from the central plane to the front surface layer. This wafer is characterized in that the wafer has a non-uniform distribution of crystal lattice vacancies, wherein (a) the concentration of crystal lattice vacancies in the bulk layer are greater than the concentration of crystal lattice vacancies in the front surface layer, (b) the crystal lattice vacancies have a concentration profile in which the peak density of the crystal lattice vacancies is at or near the central plane, and (c) the concentration of crystal lattice vacancies generally decreases from the position of peak density toward the front surface of the wafer. In addition, the front surface of the wafer has an epitaxial layer deposited thereon. This epitaxial layer has a thickness of from about 0.1 to about 2.0 &mgr;m.

This invention is directed to a novel a single crystal silicon wafer. The wafer comprises: (a) two major generally parallel surfaces (ie., the front and back surfaces); (b) a central plane between and parallel to the front and back surfaces; (c) a front surface layer which comprises the region of the wafer extending a distance of at least about 10 &mgr;m from the front surface toward the central plane; and (d) a bulk layer which comprises the region of the wafer extending from the central plane to the front surface layer. This wafer is characterized in that the wafer has a non-uniform distribution of crystal lattice vacancies, wherein (a) the concentration of crystal lattice vacancies in the bulk layer are greater than the concentration of crystal lattice vacancies in the front surface layer, (b) the crystal lattice vacancies have a concentration profile in which the peak density of the crystal lattice vacancies is at or near the central plane, and (c) the concentration of crystal lattice vacancies generally decreases from the position of peak density toward the front surface of the wafer. In addition, the front surface of the wafer has an epitaxial layer deposited thereon. The epitaxial layer has an average light scattering event concentration of no greater than about 0.06/cm,as measured by a laser-based auto inspection tool configured to detect light scattering events corresponding to polystyrene spheres having diameters of no less than about 0.12 &mgr;m. The bulk layer comprises voids which are at least about 0.01 &mgr;m in their largest dimension.

Epitaxial silicon wafer with intrinsic gettering

A horizontal reactor for depositing an epitaxial layer on a semiconductor wafer. The reactor includes a reaction chamber sized and shaped for receiving the semiconductor wafer and a susceptor having an outer edge and a generally planar wafer receiving surface positioned in the reaction chamber for supporting the semiconductor wafer. In addition, the reactor includes a heating array positioned outside the reaction chamber including a plurality of heat lamps and a primary reflector for directing thermal radiation emitted by the heat lamps toward the susceptor to heat the semiconductor wafer and susceptor. Further, the reactor includes a secondary edge reflector having a specular surface positioned beside the heating array for recovering misdirected thermal radiation directed generally to a side of the heating array and away from the susceptor. The secondary edge reflector is shaped and arranged with respect to the heating array and the susceptor for re-directing the misdirected thermal radiation to the outer edge of the susceptor. Thus, the secondary edge reflector heats the edge and reduces thermal gradients across the susceptor and the semiconductor wafer to inhibit slip dislocations in the wafer during epitaxial layer deposition.

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Mountain View, CA, United States of America

Jon A Rossi