Menara Networks, Inc.

Holt Integrated Circuits

Jomo K Edwards

Salam Elahmadi

Harry Tan

Devin K Ng

Christopher A Gill

Matthias Bussman

George S Noh

David J Mead

Kevin P Smith

William G Holt

Disclosed herein, one embodiment of the disclosure is directed to an apparatus for receiving Aeronautical Radio, Incorporated (ARINC) 429 bus signals. The apparatus may comprise: a modulator that modulates the ARINC 429 bus signals onto a carrier signal and generates a modulated signal using only power supplied by the ARINC 429 bus; and a demodulator that recovers ARINC 429 bus baseband binary data from the modulated signal, wherein the modulated signal propagates from the modulator to the demodulator through capacitive coupling.

Analog front-end with galvanically isolated differential bus

An embodiment of the present invention is a technique for timing recovery. A frequency acquisition loop locks a voltage controlled oscillator (VCO) clock of a multi-band VCO to a reference clock. The frequency acquisition loop generates first and second feedback clocks from the VCO clock. A data lock phase loop generates a driving signal corresponding to a phase error signal from interleaved partial response signal (PRS) samples based on the second feedback clock. The driving signal controls the multi-band VCO in a data phase lock mode. A lock detect controller detects a frequency lock condition in a frequency lock mode and a data lock condition in the data phase lock mode based on the first feedback clock and the reference clock.

Timing recovery for partial-response maximum likelihood sequence detector

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Aliso Viejo, CA, United States of America

Jomo K Edwards