Sony Corporation

Joji Fukuda

Seiichi Misawa

Kiyoshi Ota

Toshiyuki Ishii

Tetsuo Nishigaki

Kousuke Misono

Kenichi Kobayashi

Toshinori Nakamura

Takaaki Enomoto

Yutaka Yamashiki

Yutaka Ohkubo

Yutaka Okubo

Akira Takezawa

In a recording and reproducing apparatus having at least one program recorded to recording tracks on a recording medium, management database is recorded on the recording tracks with the program so as to form a management database recording field. The management data is reproduced on being loaded the recording medium to the recording and reproducing apparatus to manage each program recorded on the recording tracks. In the case of video tape recorder, the management data is recorded on video recording tracks, audio recording tracks and/or a control signal recording tracks. therefore, to cover in the appended claims all such changes and modifications as fall within the true spirit and scope of the invention.

Video tape recorder having control head upstream of erase head

In a recording and reproducing apparatus having at least one program recorded in recording tracks on a recording medium, a management database is recorded on the recording tracks with the program so as to form a management database recording field. The management data is reproduced when the recording medium is loaded in the recording and reproducing apparatus to manage each program recorded on the recording tracks. In the case of a video tape recorder, the management data is recorded on video recording tracks, audio recording tracks and/or control signal recording tracks.

AV data base for VTR

Video tape recorder for recording management data on video tape

A control data input apparatus for feeding control data to an electronic apparatus, wherein words of a natural language representing a plurality of control commands for a controlled system are received and, after analysis of the natural language expressed by a combination of the words, the control commands are fed to the controlled system so that control of such system is rendered executable by the input natural language. The apparatus comprises word input system with an input keyboard provided corresponding to words of a natural language which represent a plurality of control commands for a controlled system, and natural language processing system responsive to a word input from the input keyboard of the word input system and functioning to analyze the natural language expressed by a combination of the words from the word input system, thereby forming data of control commands represented by the natural language. The control commands represented by the natural language and analyzed by the natural language processing system are fed to a controlled system.

Control data input apparatus

A microcomputer system has two central processing units, an original and one added to expand the system, each having an associated memory and being interconnected through an appropriate signal bus arrangement, however, only the first or original central processing unit employs an input/output device for inputting/outputting data; a bus controller and bus arbiter including a status signal generator are connected to the signal bus to provide addresses to permit the second or added central processing unit to be mapped onto the input/output address of the first central processing unit. The first central processing unit and its associated memory circuits and buses and the like then appear as peripherals with direct memory access from the viewpoint of the second or added central processing unit. A priority decoder is provided to insure that the first central processing unit has bus priority over the second central processing unit.

Micro computer system

A microcomputer system having a central processing unit (CPU) responsive to mode control signals for operating the system in respective operating modes, a power supply circuit for supplying a reset signal to the CPU, a memory, and a keyboard, is provided with a mode selecting circuit which includes a logical gate with inputs and with outputs coupled to the CPU for supplying the mode control signals, a selector switch device connected with the logical gate for selectively determining which of the mode control signals is supplied to the CPU, and a sensing means connected with the logical gate for causing one of the mode control signals to be applied to the CPU when the reset signal is supplied to the CPU and the keyboard is simultaneously actuated, irrespective of the condition of the selector switch device.

Microcomputer system operating in multiple modes

A semiconductor random access memory system for use in a processor system is adapted to operate with a magnetic disc storage device, such as the so-called floppy-disc store. A semiconductor RAM has data input/output terminals and address terminals for writing data into or reading data out of a storage location that is addressed by an address signal supplied to the address terminals. Track and sector address registers are coupled to the processor system for receiving and storing the typical track and sector address signals normally generated in the system. A counter counts timing pulses to produce a changing count signal, which timing pulses are generated by a timing control circuit. An address synthesizer is coupled to the track and sector address registers and also to the counter for synthesizing a RAM address signal from the stored track and sector address signals as well as the count signal and for supplying this RAM address signal to the RAM address terminals to access the RAM storage location which is addressed thereby. Thus, when the processor system generates the typical track and sector address signals normally used with a floppy disc store, such track and sector address signals are used to address a typical semiconductor RAM.

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Kanagawa, Japan

Joji Fukuda