Texas Instruments Corporation

Johnson J Lin

Bruce E Gnade

David J Myers

Shin-Puu Jeng

Rajiv R Shah

Dennis I Robbins

Toan Tran

Stephen P Sacarisen

David R Wyke

Gene E Blankenship

Steve Thompson

A method disclosed herein for making a spacer 30 useful for maintaining a fixed spacing between the cathode 12 and anode 10 structures of a flat display. The method includes the steps of melting an end of a glass filament 40 held in the bore of a capillary 42, urging the melted end 46 against the surface 23 of the cathode structure 12 to form a bond thereon, and severing the filament 40 at a fixed distance h from the surface 23 to thereby form an upright spacer 30. The severing step may be accomplished by tilting or twisting the capillary 42 until the filament 40 is severed, or by cutting the filament 40 with a torch flame 54. The bonding process may be enhanced by preheating the cathode structure 12 and/or by subjecting the cathode structure 12 to ultrasonic vibration during bonding.

Method of forming spacers for a flat display apparatus

A method and structure for a titanium tungsten (TiW)/tungsten local interconnect (136) for cells (100) of semiconductor device includes steps and structure resulting from sputtering a titanium tungsten (TiW) layer (128) on semiconductor structure (100) and then forming a tungsten layer over the TiW layer (128). Then, the method is to pattern a layer of resistive polymer (32) such as photoresist in a predetermined lithographic pattern over the structure (100). This forms the local interconnect (136) from the TiW layer (128). Then, by dry etching, the process removes exposed portions of the tungsten and TiW layers. A wet strip process removes resistive polymer (32) from the semiconductor structure (100) to yield TiW/tungsten interconnect (136) for the semiconductor structure (100). Alternatively a single TiW layer is used in which exposed portions of the TiW layer are removed by a wet etch.

Method for forming titanium tungsten local interconnect for integrated

A process for making a metal fuse link in a MOS or CMOS process which includes depositing a refractory metal or metal alloy over an already deposited multi-level oxide and patterning the deposited metal or metal alloy so that it has a fusing segment between and integral with expanded segments such that the length and cross sectional area of the fusing segment is sufficiently small so that the fusing current therethrough is less than 20 milliamperes. The fuse and surrounding circuitry is covered with a passivation layer and contacts formed in the passivation layer to the expanded segments.

MOS programmable memories using a metal fuse link and process for making

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Plano, TX, United States of America

Johnson J Lin