Cree Gmbh

Cree Research Inc.

North Carolina State University

General Electric Company

Wolfspeed, Inc.

Purdue Research Foundation

John Williams Palmour

Anant Kumar Agarwal

Lin Cheng

Sei-Hyung Ryu

Vipindas Pala

Mrinal Kanti Das

Scott Thomas Allen

Qingchun Zhang

Daniel Jenner Lichtenwalner

Jason Patrick Henning

Ranbir Singh

Lori A Lipkin

Scott Thomas Sheppard

John Adam Edmond

Edward Robert Van Brunt

Sarit Dhar

Henry Lin

Alexander A Suvorov

Hudson McDonald Hobgood

Jason Ronald Jenny

David Beardsley Slater, Jr

Richard J Saia

Dale M Brown

Robert F Davis

Alexander V Suvorov

Helmut Hagleitner

Van Mieczkowski

Robert J Callanan

Marcelo Schupbach

Charlotte Jonas

Jason Gurganus

Doyle Craig Capell

Jonathan Young

Terrence S Alcorn

Robert C Glass

Lisa S Porter

Dave Grider

Hua-shuang Kong

Richard Peter Smith

Calvin H Carter, Jr

James Albert Cooper, Jr

Michael O'Loughlin

James A Cooper, Jr

Albert Augustus Burk, Jr

Craig Capell

Erik Maki

Vipindis Pala

Lori Lipkin

Calvin H Carter

A power metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a drift layer over the substrate, and a spreading layer over the drift layer. The spreading layer includes a pair of junction implants separated by a junction gate field effect (JFET) region. A gate oxide layer is on top of the spreading layer. The gate contact is on top of the gate oxide layer. Each one of the source contacts are on a portion of the spreading layer separate from the gate oxide layer and the gate contact. The drain contact is on the surface of the substrate opposite the drift layer.

Vertical power transistor device

A Schottky diode is disclosed that includes a silicon carbide substrate, a silicon carbide drift layer, a Schottky contact, and a passivation structure. The silicon carbide drift layer provides an active region and an edge termination region about the active region. The Schottky contact has sides and a top extending between the two sides and includes a Schottky layer over the active region and an anode contact over the Schottky layer. The passivation structure covers the edge termination region, the sides of the Schottky contact, and at least a portion of the top of the Schottky contact. The passivation structure includes a first silicon nitride layer, a silicon dioxide layer over the first silicon nitride layer, and a second silicon nitride layer over the silicon dioxide layer.

Passivation structure for semiconductor devices

The present disclosure relates to a power module that has a housing with an interior chamber and a plurality of switch modules interconnected to facilitate switching power to a load. Each of the plurality of switch modules comprises at least one transistor and at least one diode mounted within the interior chamber and both the at least one transistor and the at least one diode are majority carrier devices, are formed of a wide bandgap material system, or both. The switching modules may be arranged in virtually any fashion depending on the application. For example, the switching modules may be arranged in a six-pack, full H-bridge, half H-bridge, single switch or the like.

Low switching loss high performance power module

A power module is disclosed that includes a housing with an interior chamber wherein multiple switch modules are mounted within the interior chamber. The switch modules comprise multiple transistors and diodes that are interconnected to facilitate switching power to a load. In one embodiment, at least one of the switch modules supports a current density of at least 10 amperes per cm.

Power module for supporting high current densities

A vertical field-effect transistor (FET) device includes a monolithically integrated bypass diode connected between a source contact and a drain contact of the vertical FET device. According to one embodiment, the vertical FET device includes a pair of junction implants separated by a junction field-effect transistor (JFET) region. At least one of the junction implants of the vertical FET device includes a deep well region that is shared with the integrated bypass diode, such that the shared deep well region functions as both a source junction in the vertical FET device and a junction barrier region in the integrated bypass diode. The vertical FET device and the integrated bypass diode may include a substrate, a drift layer over the substrate, and a spreading layer over the drift layer, such that the junction implants of the vertical FET device are formed in the spreading layer.

Seminconductor device with spreading layer

A semiconductor device includes a semiconductor body and an insulated gate contact on a surface of the semiconductor body over an active channel in the semiconductor device. The insulated gate contact includes a channel mobility enhancement layer on the surface of the semiconductor body, a diffusion barrier layer over the channel mobility enhancement layer, and a dielectric layer over the diffusion barrier layer. By using the channel mobility enhancement layer in the insulated gate contact, the mobility of the semiconductor device is improved. Further, by using the diffusion barrier layer, the integrity of the gate oxide is retained, resulting in a robust semiconductor device with a low on-state resistance.

Semiconductor device with improved insulated gate

Monolithically integrated vertical power transistor and bypass diode

A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.

Field effect transistor devices with buried well protection regions

Power module having a switch module for supporting high current densities

A power module includes a housing with an interior chamber and multiple switch modules mounted within the interior chamber of the housing. The switch modules are interconnected and configured to facilitate switching power to a load. Each one of the switch modules includes at least one transistor and at least one diode. The at least one transistor and the at least one diode may be formed from a wide band-gap material system, such as silicon carbide (SiC), thereby allowing the power module to operate at high frequencies with lower switching losses when compared to conventional power modules.

High current, low switching loss SiC power module

The present disclosure generally relates to a Schottky diode that has a substrate, a drift layer provided over the substrate, and a Schottky layer provided over an active region of the drift layer. The metal for the Schottky layer and the semiconductor material for the drift layer are selected to provide a low barrier height Schottky junction between the drift layer and the Schottky layer.

Schottky diode

Growing community of inventors

Cary, NC, United States of America

John Williams Palmour