Lawrence Livermore National Security, LLC

University of California

John William Sherohman

Jick Hong Yee

Arthur William Coombs, Iii

Kuang Jen J Wu

Arthur W Combs, Iii

Electronic device quality Aluminum Antimonide (AlSb)-based single crystals produced by controlled atmospheric annealing are utilized in various configurations for solar cell applications. Like that of a GaAs-based solar cell devices, the AlSb-based solar cell devices as disclosed herein provides direct conversion of solar energy to electrical power.

Development of an electronic device quality aluminum antimonide (AlSb) semiconductor for solar cell applications

In one embodiment, a method for forming a non-conductive crystalline oxide layer on an AlSb crystal includes heat treating an AlSb crystal in a partial vacuum atmosphere at a temperature conducive for air adsorbed molecules to desorb, surface molecule groups to decompose, and elemental Sb to evaporate from a surface of the AlSb crystal and exposing the AlSb crystal to an atmosphere comprising oxygen to form a crystalline oxide layer on the surface of the AlSb crystal. In another embodiment, a method for forming a non-conductive crystalline oxide layer on an AlSb crystal includes heat treating an AlSb crystal in a non-oxidizing atmosphere at a temperature conducive for decomposition of an amorphous oxidized surface layer and evaporation of elemental Sb from the AlSb crystal surface and forming stable oxides of Al and Sb from residual surface oxygen to form a crystalline oxide layer on the surface of the AlSb crystal.

Thermal oxidation of single crystal aluminum antimonide and materials having the same

Bulk Aluminum Antimonide (AlSb)-based single crystal materials have been prepared for use as ambient (room) temperature X-ray and Gamma-ray radiation detection.

High resistivity aluminum antimonide radiation detector

For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The AlSb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-&#x212b; family heterostructure devices.

Growing community of inventors

Livermore, CA, United States of America

John William Sherohman