Agere Systems Inc.

Infinera Corporation

Lucent Technologies Inc.

Lsi Corporation

Avago Technologies General IP (singapore) Pte. Ltd.

At&t Bell Laboratories

Triquint Technology Holding Co.

At+t Corp.

Agere Systems Guardian Corp.

Agere Systems Optoelectronics Guardian Corp.

Infinera Coporation

John William Osenbach

Mark Adam Bachman

Fred A Kish, Jr

Peter Weindel Evans

Sailesh Mansinh Merchant

Thomas Herbert Shilling

Scott W Corzine

Vikrant Lal

Mingzhi Lu

Jin Yan

Brian Thomas Vaccaro

Mindaugas Fernand Dautartas

Frank Alexander Baiocchi

Jiaming Zhang

James F Dormer

Hugo Fernando Safar

John Michael DeLucca

Casimir R Nijander

Michael F Brady

Weidong Xie

Ahmed Nur Amin

Kishor V Desai

Gustav Edward Derkits, Jr

David Gerald Coult

John McKenna Brennan

Joze E Antol

Miguel Iglesias Olmedo

Ralph Salvatore Moyer

Ronald James Weachock

Steven L Moyer

Mary J Nadeau

Maria Anagnosti

Joseph Michael Freund

Qwai Hoong Low

Kurt George Steiner

Brian Dale Potteiger

Jie Tang

Jeffery John Gilbert

Patrick Joseph Carberry

Robert B Comizzoli

David Angst

Edward A Pitman

William James Minford

Renyi Yang

George John Libricz, Jr

Robert B Crispell

David Lee Crouthamel

Barry J Dutt

John Coronati

Donald G Schimmel

Robert Scott Kistler

S Eugene Messenger

Steven P O'Neill

Joseph P Keska

Rory Keene Schlenker

Harvey Edward Bair

Yiu-Man Wong

Wilbur Dexter Johnston, Jr

Franklin Wall, Jr

Fred A Kish

Richard Lawrence Shook

Matthew E Stahley

Brian Stauffer Auker

Larry W Golick

Allan James Bruce

Won-Tien Tsang

Utpal Kumar Chakrabarti

Gordon Albert Thomas

Daniel Patrick Chesire

Timothy Butrie

Jueinai Raynien Kwo

Anatoly Feygenson

Steven D Cate

Rafael Nathan Kleiman

Charles B Roxlo

Naresh Chand

Henry Miles O'Bryan

Robert McLemore Fleming

Michael Reffle

Craig Young

Alexandru Paunescu

Morgan J Thoma

Bryan P Segner

Robert Comizzoli

Douglas A Herr

Timothy Paul Bock

Jason Paul Goodelle

Mark B Cholewa

Katherine Anne Yanushefski

Jeffrey John Gilbert

Joseph Micheal Freund

Aleksandra Yudina

Michael G Palin

Mark Karnacewicz

Marilyn Markey Ecker

Anatoly Feyenson

William R Knolle

Kultaransingh N Hooghan

Curtis A Jack

Poopa Ruengsinsub

Disclosed herein are multi-layer substrates for integrated circuit packages and methods of making the same. The multi-layer substrate may comprise a plurality of lower layers, at least one core layer, a plurality of upper layers, and a side surface. A first connection and a second connection may extend through or on an uppermost layer of the plurality of upper layers. A trace may be embedded in or on one of the plurality of upper layers, the trace electrically connected to the first connection and the second connection. A first mounting pad and a second mounting pad may be positioned on the side surface and/or the uppermost layer of the plurality of upper layers and a blocking capacitor may be electrically connected to the first mounting pad and the second mounting pad with the second mounting pad electrically connected to the second connection.

Hybrid integrated circuit package

Systems and methods of providing a bare circuit integrated circuit package with a containment ring are described. The bare circuit integrated circuit package may be provided with a substrate connected to a printed circuit board. An integrated circuit may be connected to the substrate. A stiffener ring that surrounds the integrated circuit may be attached to the substrate. A heat sink may be positioned on the stiffener ring and over the integrated circuit such that there is a space between a top of the integrated circuit and a bottom surface of the heat sink. A thermal interface material may be provided to thermally connect the integrated circuit and the heat sink. A containment ring may be positioned between the stiffener ring and the integrated circuit, the containment ring sized and positioned to prevent pumping and/or displacement of the thermal interface material.

Thermal interface material containment

Opto-electronic packages and methods for making opto-electronic packages are disclosed, including a method comprising forming an opto-electronic circuit on a first surface of a substrate of a lower package assembly, the first surface of the substrate having a first bonding pattern configured to provide a hermetic seal, the first bonding pattern extending around the opto-electronic circuit; positioning a bottom of a ring frame onto the first bonding pattern so as to surround the opto-electronic circuit with the ring frame; hermetically sealing a bottom of the ring frame to the first bonding pattern of the first surface of the substrate of the lower package assembly subsequent to the formation of the opto-electronic circuit on the first surface of the substrate; and hermetically sealing a top of the ring frame to form a hermetically sealed opto-electronic package.

Opto-electronic package and a method for making an opto-electronic package

A method of fabricating a heat pipe may include providing a first material as a body section. The method may include stamping or etching the body section to include the cavity. A portion of the body section may constitute a wall of the cavity. The method may include stamping or etching the wall of the cavity to provide a set of corrugations on a portion of the wall of the cavity. The method may include forming an opening in the wall of the cavity. The method may include attaching a lid over the cavity. The lid constituting at least a portion of a hermetic seal of the cavity. The method may include attaching a cover to the body section approximately adjacent to the opening in the cavity. The method may include attaching a valve to the body section approximately at the opening to the cavity.

Low-cost nano-heat pipe

Methods, systems, and apparatus, including a laser including a layer having first and second regions, the first region including a void; a mirror section provided on the layer, the mirror section including a waveguide core, at least part of the waveguide core is provided over at least a portion of the void; a first grating provided on the waveguide core; a first cladding layer provided between the layer and the waveguide core and supported by the second region of the layer; a second cladding layer provided on the waveguide core; and a heat source configured to change a temperature of at least one of the waveguide core and the grating, where an optical mode propagating in the waveguide core of the mirror section does not incur substantial loss due to interaction with portions of the mirror section above and below the waveguide core.

Tunable waveguide devices

Methods, systems, and apparatus, including a photonic integrated circuit package, including a photonic integrated circuit chip, including an active optical element; an electrode configured to receive an electrical signal; a ground electrode; and a bond contact electrically coupled to the electrode; and an ASIC chip including circuitry configured to provide the electrical signal; and a bond contact that is electrically coupled to the circuitry; an bridge chip bonded to at least a portion of the photonic integrated circuit chip and at least a portion of the ASIC chip.

Photonic integrated circuit package

Methods, systems, and apparatus, including a photonic integrated circuit package, including a photonic integrated circuit chip, including multiple electrodes configured to receive the electrical signal, where at least one characteristics of a segment of the traveling wave active optical element is changed based on the electrical signal received by a corresponding electrode of the multiple electrodes; a ground electrode; and multiple bond contacts; and an interposer bonded to at least a portion of the photonic integrated circuit chip, the interposer including a conductive trace formed on a surface of the interposer, the conductive trace electrically coupled to a source of the electrical signal; a ground trace; and multiple conductive vias electrically coupled to the conductive trace, where each conductive via of the multiple conductive vias is bonded with a respective bond contact of the multiple bond contacts of the photonic integrated circuit chip.

Methods, systems, and apparatus, including a photonic integrated circuit package, including a photonic integrated circuit chip, including a lumped active optical element; an electrode configured to receive an electrical signal, where at least one characteristics of the lumped active optical element is changed based on the electrical signal received by the electrode; a ground electrode; and a bond contact electrically coupled to the electrode; and an interposer bonded to at least a portion of the photonic integrated circuit chip, the interposer including a conductive trace formed on a surface of the interposer, the conductive trace electrically coupled to a source of the electrical signal; a ground trace; and a conductive via bonded with the bond contact of the photonic integrated circuit chip, the conductive via electrically coupled to the conductive trace to provide the electrical signal to the electrode of the photonic integrated circuit chip.

A device may include a first substrate. The device may include an optical source. The optical source may generate light when a voltage or current is applied to the optical source. The optical source may be being provided on a first region of the first substrate. The device may include a second substrate. A second region of the second substrate may form a cavity with the first region of the first substrate. The optical source may extend into the cavity. The device may include an optical interconnect. The optical interconnect may be provided on or in the second substrate and outside the cavity. The optical interconnect may be configured to receive the light from the optical source.

Photonic integrated circuit (PIC) and silicon photonics (SIP) circuitry device

Growing community of inventors

Kutztown, PA, United States of America

John William Osenbach