Rockwell Scientific Licensing LLC

Innovative Technology Licensing LLC

Teledyne Scientific and Imaging, LLC

John White

D Morgan Tench

Jeffrey DeNatale

Leslie F Warren, Jr

Philip Stupar

Robert L Borwick, Iii

Greg W Davis

Maureen R Brongo

Dieter Dornisch

Alex P Moffatt

Les Warren

Chailun Tsai

Zhimin J Yao

Kathleen Garrett

Morgan Tench

Embodiments of the present invention are directed to a process for forming small diameter vias at low temperatures. In preferred embodiments, through-substrate vias are fabricated by forming a through-substrate via; and depositing conductive material into the via by means of a flowing solution plating technique, wherein the conductive material releases a gas that pushes the conductive material through the via to facilitate plating the via with the conductive material. In preferred embodiments, the fabrication of the substrate is conducted at low temperatures.

Low temperature method for fabricating high-aspect ratio vias and devices fabricated by said method

A new cell assembly for semiconductor wafer electroplating in the plated-side-up configuration utilizes a narrow passageway around the perimeter of the wafer through which solution is forced so as to provide the laminar flow needed for effective Damascene copper plating. In addition, use of a cylindrical insulating cell wall whose inside diameter matches that of the wafer area being plated avoids overplating of the wafer periphery. Anode isolation in a compartment separated via a solution transport barrier prevents introduction of particulates and holds anolyte in place during wafer changes. This cell assembly is readily amendable to automated wafer plating.

Semiconductor wafer plating cell assembly

The acid copper sulfate solutions used for electroplating copper circuitry in trenches and vias in IC dielectric material in the Damascene process are replaced with a type of plating system based on the use of highly complexing anions (e.g., pyrophosphate, cyanide, sulfamate, etc.) to provide an inherently high overvoltage that effectively suppresses runaway copper deposition. Such systems, requiring only one easily-controlled organic additive species to provide outstanding leveling, are more efficacous for bottom-up filling of Damascene trenches and vias than acid copper sulfate baths, which require a minimum of two organic additive species. The highly complexed baths produce fine-grained copper deposits that are typically much harder than large-grained acid sulfate copper deposits, and which exhibit stable mechanical properties that do not change with time, thereby minimizing &ldquo;dishing&rdquo; and giving more consistent CMP results. The mechanical properties and texture of the fine-grained deposits are also much less substrate dependent, which minimizes the effects of variations and flaws in the barrier and seed layers. The resistivity of pyrophosphate and annealed acid sulfate copper deposits are approximately equivalent.

Integrated circuit plating using highly-complexed copper plating baths

A cathode assembly for semiconductor wafer plating employs a polymer coating on a metal structural ring to provide a low-profile seal to the perimeter of the wafer surface to be plated. The polymer coating also electrically insulates the metal so that it can be used in contact with the plating solution and still be part of the electrical contact system, eliminating the need for a protective plastic housing. This invention permits the dimensions of the cathode assembly to be minimized. A compact cathode assembly with minimum protrusion above the wafer plated surface enables modifications to the plating cell and agitation system providing more uniform copper deposits across the wafer surface and facilitating automation of the wafer plating process.

Semiconductor wafer plating cathode assembly

A direct displacement plating process provides a uniform, adherent coating of a relatively stable metal (e.g., nickel) on a highly reactive metal (e.g., aluminum) that is normally covered with a recalcitrant oxide layer. The displacement reaction proceeds, preferably in a nonaqueous solvent, as the oxide layer is dissolved by a fluoride activator. Halide anions are used to provide high solubility, to serve as an anhydrous source of stable metal ions, and to control the rate of the displacement reaction. A low concentration of activator species and little or no solution agitation are used to cause depletion of the activator species within pores in the surface oxide so that attack of the reactive metal substrate is minimized. Used in conjunction with electroless nickel deposition to thicken the displacement coating, this process can be used to render aluminum pads on IC chips solderable without the need for expensive masks and vacuum deposition operations. Such coatings can also be used to preserve or restore wire bondability, or for corrosion protection of aluminum and other reactive structural metals and alloys. A thin layer of immersion gold can be used to protect the thickened coating from oxidation. The solderable aluminum IC chip pads provide the basis for a maskless bumping process for flip chip attachment.

Controlled plating on reactive metals

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John White