Adeia Semiconductor Bonding Technologies Inc.

Iessera, Inc.

John W Smith

Thomas H DiStefano

Joseph Charles Fjelstad

Konstantine N Karavakis

Zlata Kovac

Belgacem Haba

Craig S Mitchell

Masud Beroz

David Noel Light

Christopher M Pickett

James B Zaccardi

Tony Faraci

A Christian Walton

Anthony B Faraci

Thomas Di Stefano

Matthew T Hendrickson

Hung-Ming Wang

Kurt Raab

Owais Jamil

Bruce M McWilliams

Pieter H Bellaar

Delin Li

Michael Warner

David R Baker

Mitchell Koblis

Joseph Fjeslstad

Dennis Castillo

A method of making a microelectronic package includes providing a first substrate having a top surface, providing a second substrate having a top surface including a plurality of conductive pads, a bottom surface remote therefrom and an opening extending between the top and bottom surfaces, and securing the second substrate over the first substrate so that the bottom surface of the second substrate confronts the top surface of the first substrate, wherein the first and second substrates have coefficients of thermal expansion that are substantially similar to one another. The method also includes placing a microelectronic element having a front face with contacts and a back face remote therefrom in the opening of the second substrate and securing the microelectronic element over the first substrate so that the back face of the microelectronic element confronts the top surface of the first substrate, and electrically interconnecting the contacts of the microelectronic element with the conductive pads of the second substrate.

Methods of making microelectronic packages

An assembly includes a structure, a plurality of terminals and a plurality of compliant pads disposed between said terminals and said structure. The terminals are aligned with at least some of said pads, with the pads providing a standoff between the structure and the terminals. The compliant pads are preferably made of a non-conductive material such as a silicone elastomer.

Methods of making microelectronic assemblies including compliant interfaces

A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.

Semiconductor package with heat sink

A flexible sheet used in manufacture of microelectronic components is held on a frame formed from a rigid material so that the frame maintains the sheet under tension during processing and thereby stabilizes the dimensions of the sheet. The frame may be formed from a rigid, light-transmissive material such as a glass, and the bond between the frame and sheet may be made or released by light transmitted through the frame. Preferred features of the framed sheet minimize entrapment of processing liquids such as etch solutions, thereby minimizing carryover of processing solutions between steps. The frame may have contact openings which permit engagement of a metallic layer on the sheet by an electrode carrying electroplating or etching current without disturbing the main portion of the sheet where features are to be formed or treated.

Enhancements in framed sheet processing

A method is disclosed for making a microelectronic package. A material is applied to a first major surface of a microelectronic element to reduce the heights of protrusions projecting from the first major surface. The microelectronic element is assembled to a microelectronic component. A method of forming protrusions and an assembly incorporating the microelectronic element having protrusions is also disclosed.

Microelectronic assemblies having low profile connections

A connection component for use in making microelectronic element assemblies which has peelable leads that are formed on a dielectric support structure. One end of each lead is permanently connected to the support structure and the opposite end of the lead is releasably connected to the support structure. When the releasable end of the lead is bonded to a contact on a semiconductor chip, the releasable end of the lead can be peeled from the support structure such that the chip may be moved away from the support structure. A compliant layer may be disposed between the chip and the support structure. If a compliant material is injected between the chip and the support structure to form the compliant layer, the compliant material will lift the chip away from the support structure and facilitate the peeling of the leads from the support structure.

Connection component with peelable leads

Multi-layer components such as circuit panels are fabricated by connecting conductive features such as traces one two or more superposed substrates using leads extending through an intermediate dielectric layer. The leads can be closely spaced to provide a high density vertical interconnection, and can be selectively connected to provide customization of the structure.

Multi-layer substrates and fabrication processes

Microelectronic contacts, such as flexible, tab-like, cantilever contacts, are provided with asperities disposed in a regular pattern. Each asperity has a sharp feature at its tip remote from the surface of the contact. As mating microelectronic elements are engaged with the contacts, a wiping action causes the sharp features of the asperities to scrape the mating element, so as to provide effective electrical interconnection and, optionally, effective metallurgical bonding between the contact and the mating element upon activation of a bonding material.

Method of making an electronic contact

A first microelectronic element is provided with leads having anchor ends connected to contacts and tip ends moveable with respect to the first microelectronic element. The leads can be provided on a carrier sheet that is assembled to the first microelectronic element, or may be formed in situ on the surface of the first element. The leads may be unitary strips of a conductive material, and the anchor ends of the leads may be bonded to the contacts of the first microelectronic element by processes such as thermosonic or ultrasonic bonding. Alternatively, stub leads may be provided on a separate carrier sheet or formed in situ on the front surface of the first microelectronic element, and these stub leads may be connected by wire bonds to the contacts of the first microelectronic element so as to form composite leads. The tip ends of the leads are joined to a second microelectronic element that is moved away from the first microelectronic element so as to deform the leads.

Microelectronic assembly formation with releasable leads

A method of making a compliant microelectronic package includes providing a first substrate having a top surface with conductive pads and an opening extending therethrough to the first substrate so that a bottom surface of the second substrate confronts a top surface of the first substrate. A microelectronic element is attached to the first substrate so that a back face of the microelectronic element confronts the top surface of the first substrate. The contacts of the microelectronic element are electrically interconnected with the conductive pads of the second substrate. A dielectric sheet having conductive leads is juxtaposed with the first substrate. The second ends of the leads are electrically interconnected with the conductive pads of the second substrate, and the dielectric sheet and the second substrate are moved away from one another so as to vertically extend the leads.

Low cost and compliant microelectronic packages for high I/O and fine pitch

An active microelectronic element such as a semiconductor chip or wafer is bonded to an interconnect element having substantially the same coefficient of thermal expansion as the active element using small, rigid bonds, desirably made by a solid-phase bonding technique, which accommodate numerous closely-spaced interconnections. The assembly is provided with terminals movable with respect to the active element and interconnect element. The interconnect element desirably provides low-impedance conductive paths interconnecting active electronic devices within the active element.

Semiconductor chip package with interconnect structure

A component incorporating a dielectric element such as a polymeric film with leads and terminals thereon is assembled with a semiconductor chip and bond regions of the leads are connected to contacts of the chip. At least one lead incorporates a plural set of connecting regions connecting the bond region of that lead to a plurality of terminals. One or more of the connecting regions in each such plural set are severed so as to leave less than all of the terminals associated with each such plural set connected to the contacts of the chip.

Method of making a compliant integrated circuit package

A connection component including a flexible substrate having a top surface and a bottom surface, a layer of a compliant, dielectric material overlying the top surface of the substrate, the compliant material layer having a top surface remote from the substrate, an array of flexible, conductive leads having first ends attached to terminals accessible at the bottom surface of the substrate and second ends adjacent the top surface of the compliant layer, wherein each lead comprises a core of a first conductive material surrounded by a layer of a second conductive material, the second conductive material having a greater yield strength than the first conductive material.

Microelectronic packages having an array of resilient leads

A method of making a microelectronic assembly includes juxtaposing a first element, such as a dielectric sheet having conductive leads thereon with a second element, such as a semiconductor chip, having contact thereon, and wire bonding the conductive leads on the first element to the contacts on the second element so that elongated bonding wires extend between the conductive leads and the contacts. After the wire bonding step, the first and second elements are moved through a pre-selected displacement relative to one another so as to deform the bonding wires. A flowable dielectric material may be introduced between the first and second elements and around the bonding wires during or after the moving step. The flowable material may be cured to form an encapsulant around at least a portion of the bonding wires.

Growing community of inventors

Palo Alto, CA, United States of America

John W Smith