Stratus Technologies Bermuda Ltd.

Agfa Corporation

John W Edwards, Jr

Simon P Graham

Thomas K Hebert

Steven Michael Haid

Jeffrey S Somers

Richard James Lynch

John L Colfer

Daniel J Lussier

Mark Tetreault

Andrew Alden

John Rogers MacLeod

Timothy Wegner

Dan Lussier

Michael W Kement

Mohsen Dolaty

Tim Wegner

Robert E Nelvin

A system is provided for rapidly synchronizing two or more processing elements in a fault-tolerant computing system. Embodiments of this system allow for the rapid synchronization of two processing elements through partial copies of the contents of memory associate with each processing element.

Systems and methods for maintaining lock step operation

Disclosed is a novel structure and process for detecting protocol errors on a communications bus. According to one aspect of the invention, a protocol error detector comprises a physical error detector, a sequential error detector, and a logical error detector, each detecting physical, sequential, and logical protocol violations, respectively, and signaling a bus transaction error when a protocol violation is detected. In one embodiment, the protocol error detector substantially simultaneously checks each bus transaction for physical, sequential, and logical protocol violations. In another embodiment, the protocol error detector signals a detected bus transaction protocol violation substantially coincident with the bus transaction.

Apparatus and methods for identifying bus protocol violations

The inventive system essentially hides redundant paths to the peripheral devices from the operating system, by reporting a single &ldquo;virtual&rdquo; path to the peripheral busses over PCI bus . The virtual path includes at least a virtual peripheral bus controller and a virtual video controller. The system also tells the operating system that the real controllers are on another PCI bus on an opposite side of a PCI-to-PCI bridge connected also to PCI bus . An I/O system manager selects one of the actual paths, which may, but need not, be connected to PCI bus , to handle communications with the peripheral devices. The I/O system manager maintains the controllers on the unselected path in an off-line or standby mode, in case of a failure of one or more of the controllers on the selected path. If a failure occurs, the I/O system manager performs a fail-over operation to change the selection of controllers, and the peripheral devices continue to operate in the same manner on the peripheral busses. The operating system does not respond to the controller failure by declaring a system failure, however, because the operating system continues to look to the virtual path, with its virtual controllers, as a valid path to the peripheral devices. The system also allows hot swapping of PCI bridges, through FET isolation of the unselected controllers. The devices on the PCI bus and the peripheral busses may also be hot swapped through selective FET isolation.

System and method for operating a system with redundant peripheral bus controllers

A method, which is implemented via software on a computer, configures punches to be used on a web or sheet handling machine. The method includes: determining a queue of jobs to be processed on the machine; gathering setup information for each job; defining a punch configuration for each job; establishing punch sharing between jobs; and generating one or more punch configuration files for each job. The method can be transferred to a computerized controller via a computer-readable medium containing punch configuration code.

Punch configuration system and method

Growing community of inventors

Clinton, MA, United States of America

John W Edwards, Jr