Lsi Logic Corporation

Lsi Corporation

John V Jensen

Mario Garza

Nicholas K Eib

Keith K Chao

Ranko L Scepanovic

Nicholas F Pasch

Edwin R Jones

Richard D Schinella

Dusan Petranovic

Robert Muller

Mark Simmons

Neal Patrick Callan

Ebo H Croffie

George Edward Bailey

Nadya Strelkova

A Pseudo Low Volume Reticle (PLVR) which consists of multiple design layers on a single reticle. Specifically, the reticle can include two instances of each layer in order to facilitate die-to-die inspection techniques. A scribe is wrapped around each instance of the layer, such that both the frame and active area of the chip can be inspected with the die-to-die method. The chip consists of design data for a given part. The scribe, or frame, is preferably standard data across products which is used for yield and in line testing during the chip manufacturing process. Since only one chip and scribe unit is necessary to manufacture a device at each layer, it is only necessary that one chip and scribe instance yield during the reticle manufacturing process.

Pseudo low volume reticle (PLVR) design for ASIC manufacturing

A method for verifying reticle enhancement technique latent image sensitivity to mask manufacturing errors. The method includes the steps of revising a polygon based on mask CD distributions to provide a virtual mask, imaging the virtual mask to obtain response function statistical parameters, and comparing the statistical parameters to process tolerance requirements. Preferably, the method includes the steps of simulating an aerial and/or latent image of the virtual mask, calculating response functions based on the mask image simulation, collecting measurements and calculating statistical parameters based on the response functions, and comparing the statistical parameters with design rule requirements (i.e., for DI yield percentage for required mask manufacturing specification). The virtual mask is obtained by using mask CD distribution to induce statistical variations to layouts which have passed through the conventional OPC procedure.

Method and apparatus for verifying the post-optical proximity corrected mask wafer image sensitivity to reticle manufacturing errors

A method of making a reticle. Design data, i.e., GDSII data is read in, then a scribe or frame is built, and the design is placed in the scribe. Then, Boolean operations, sizing, OPC corrections and phase shifting are performed, as needed, perhaps using third party tools. Then, the GDS data is sorted, and a new GDS hierarchy is created where each mask layer can be generated as one mask making pattern, i.e., new cells are created representing each masking image location on the reticle, each new cell is placed in a topcell, then a gds2 file is produced where the gds2 file can be used to create a reticle or can be used to create reticle making data.

Method for reducing reticle set cost

An embodiment of the present invention provides a novel method which makes LVR to HVR registration possible by wrapping the X and Y scribes around each instance of each layer on both the LVR and HVR reticles; standard HVR reticles and LVR reticles will not align to one another due to registration and electrical test structures in the scribe being in different locations. Another embodiment of the present invention addresses the loss of die per wafer due to increased scribe area when using LVR and HVR reticles in the same set.

Mixed LVR and HVR reticle set design for the processing of gate arrays, embedded arrays and rapid chip products

A photolithographic mask for receiving light at a wavelength, phase, and intensity and printing a desired image on a substrate with an optical system. The mask is formed on an optically transmissive substrate, called a mask blank. The mask blank is preferably one hundred percent transmissive of the light intensity at the wavelength. At least one layer of an attenuated material that is at least partially transmissive to the wavelength of the light is formed on the optically transmissive substrate. The at least one layer of the attenuated material preferably blocks from about fifty percent to about ninety-four percent of the intensity of the light at the wavelength, whereas the prior art masks use materials that block about six percent of the intensity of the light at the wavelength. The attenuated material defines three feature types on the mask, including a primary image having edges, a scattering bar disposed near the edges of the primary image, and a background region. The primary image represents the desired image to be printed on the substrate. The scattering bar is adapted to enhance a contrast of the primary image and to at least reduce the intensity of the light at the edges of the primary image. The background region is adapted to block the light without using a material that is non transmissive to the light, such as chrome. By 'block the light' it is meant that the background region substantially and preferably reduces the intensity of the light passing through the background region to about zero.

Chromeless phase shift mask

An embodiment of the present invention provides a novel method which makes LVR to HVR registration possible by wrapping the X and Y scribes around each instance of each layer on both the LVR and HVR reticles; standard HVR reticles and LVR reticles will not align to one another due to registration and electrical test structures in the scribe being in different locations. Another embodiment of the present invention addresses the loss of die per wafer due to increased sribe area when using LVR and HVR reticles in the same set.

The present invention is a method and apparatus for applying one-dimensional proximity correction to a piece of a mask pattern, by segmenting a first piece of a mask pattern with horizontal dividing lines into a plurality of segments, segmenting a second piece of said mask pattern with said horizontal dividing lines into a second plurality of segments, and applying proximity correction to a first segment from said first plurality of segments taking into consideration a second segment from said second plurality of segments.

Method and apparatus for application of proximity correction with relative segmentation

The present invention is a method and apparatus for applying proximity correction to a piece of a mask pattern, by segmenting the piece into a plurality of segments, and applying proximity correction to a first segment without taking into consideration the other segments of the piece.

Method and apparatus for application of proximity correction with unitary segmentation

A method is disclosed for identifying regions of an integrated circuit layout design where optical proximity correction will be most useful and then performing optical proximity correction on those regions only. More specifically, the method includes the following steps: (a) analyzing an integrated circuit layout design with a design rule checker to locate features of the integrated circuit layout design meeting predefined criteria; and (b) performing optical proximity correction on the features meeting the criteria in order to generate a reticle design. The criteria employed by the design rule checker to select features include outside corners on patterns, inside corners on features, feature size, feature shape, and feature angles.

Performing optical proximity correction with the aid of design rule checkers

Disclosed is a method for correcting a layout design using a design rule checker. The method includes providing a layout design file having the layout design that is to be corrected for optical proximity by the design rule checker. Providing a run set to the design rule checker. The run set includes a plurality of correction values that are used to correct a plurality of features of the layout design that have a selected space dimension. Identifying each of the plurality of features that have the selected space dimension. The method further includes correcting each of the plurality of features that have the selected space dimension with one correction value of the plurality of correction values of the run set. Preferably, the run set is generated from a correction table that has the plurality of correction values.

Optical proximity correction method and apparatus

The present invention is a method and apparatus for systematically applying proximity corrections to a mask pattern, wherein the pattern is divided into a grid of equally sized grid rectangles, an inner rectangle comprising a plurality of grid rectangles is formed, an outer rectangle comprising a second plurality of grid rectangles and the inner rectangle is formed and proximity correction is applied to the pattern contained within the inner rectangle as a function of the pattern contained within the outer rectangle.

Method and apparatus for general systematic application of proximity correction

Method of proximity correction with relative segmentation

Performing optical proximity correction with the aid of design rule

A method is disclosed for identifying regions of an integrated circuit layout design where optical proximity correction will be most useful and then performing optical proximity correction on those regions only. More specifically, the method includes the following steps: (a) analyzing an integrated circuit layout design with a design role checker to locate features of the integrated circuit layout design meeting predefined criteria; and (b) performing optical proximity correction on the features meeting the criteria in order to generate a reticle design. The criteria employed by the design role checker to select features include outside corners on patterns, inside corners on features, feature size, feature shape, and feature angles.

A system for lithographic rastering of an image, defined by an array of pixels, onto an image-accepting substrate that allows irradiation of the total pixel pattern in reduced time. The total image is first divided into a collection of one or more geometrically isolated pixel arrays, with all pixels in an array being connected to each other. Each pixel array is decomposed into a fine region, consisting of all image pixels within P pixels of a boundary of that array, where P is a selected positive integer, such as 1, 2 or 3, and a bulk region consisting of all image pixels in that array that are not part of a fine region. A pixel array may include one or more bulk regions and one or more fine regions. A fine region for a pixel array is further decomposed into a first fine sub-region with pixel width at least equal to P1 pixels, where P1 is a selected integer satisfying 2.ltoreq.P1.ltoreq.P, and a second fine sub-region with pixel width no greater than P1-1 pixels.

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Fremont, CA, United States of America

John V Jensen