Ltv Aerospace & Defense Company

Vought Corporation

Ltv Aerospace and Defense

John T Hooks, Jr

An encoder circuit utilizes a pair of digital memories clocked at a slower write than read rate to compact analog input data, blanking and synchronization pulse intervals, and generate NTSC video. The NTSC formatted data may be stored utilizing conventional NTSC tape or disc recording equipment or may be transmitted, duplicated, monitored or transcribed utilizing readily available NTSC video equipment. A decoder circuit is provided to reprocess the NTSC video formatted data and restore it to its original form by removing the synchronization and blanking intervals and, utilizing a pair of digital memories clocked at a faster write than read rate, re-stretch the data which was compacted in the time dimension by the encoder circuit.

Method and system for high density analog data storage retrieval, and

A relatively high speed memory system is provided utilizing relatively low speed electronic memory devices such as NOS integrated circuits. The memory system is organized as a planar array with rows and columns of word positions and includes an address generator for generating sequences of N address bits to access sequences of N words of data where N is greater than 1 along any selected substantially straight path in any direction along the memory array with each address generating having a set of most significant bits and a set of least significant bits. Each electronic memory device includes an address decoder which is responsive to a first plurality of address bits for selecting a memory element within the memory device and an enable circuit for enabling the memory device. The logic circuit coupling the address generator to the electronic memory devices selectively enables at least one memory device during each memory access and no one memory device is selected more than once per N memory access. In one embodiment the logic means selectively couples the least significant bits from the address generator to enable the selected memory devices the most significant bits being selectively coupled to the address decoders of the memory devices for selecting a memory element within each enabled memory device.

Memory system

An image processing system is disclosed wherein information corresponding to a selected geographical region or geometric system is stored and selectively retrieved and processed to reproduce images corresponding to selected portions of the geographical or geometric system. In a preferred embodiment, the information is initially recorded photographically and subsequently stored in a digital recording system. Processing, memory, and control systems are employed for producing video signals to be provided to video display units, for producing simulated real time images corresponding to the selected portion of the geographical or geometric system.

Growing community of inventors

Dallas, TX, United States of America

John T Hooks, Jr