Cyan Systems, Inc.

Raytheon Company

Other

USA as Represented by Secretary of the Navy

John T Caulfield

Jon Paul Curzan

Roger William Graham

Kenton Veeder

Douglas B Chrisey

James S Horwitz

David J Gulbransen

Richard H Wyles

John D Schlesselmann

Alan W Hoffman

Kevin L Pettijohn

Paul E Dorsey

Camera enclosure

A method that can detect targets is described. The method includes setting an integration time for each of a plurality of readout circuits based on a speed of the target. The readout circuits are configured to read pixels in an image detector. The pixels have a pitch of less than ten micrometers. The integration time is not more than five hundred microseconds and corresponds to a subframe of a fast frame image. The method also includes performing integrations of each readout circuit based on the integration time. Thus, a plurality of subframes are provided. A number of the subframes are averaged to provide the fast frame image.

Fast framing moving target imaging system and method

Techniques for tracing back a projectile to the projectile origin are described. A method includes detecting projectile track(s) in image(s). Each projectile track crosses multiple pixels in each image. The projectile track(s) correspond to projectile(s). The projectile track(s) in the image(s) are translated to traceback path(s). The traceback path includes a known location and a projectile origin (e.g. the location at which the projectile originated, also termed the shooter's location).

Projectile tracking and 3D traceback method

A mechanism for radiation detection is disclosed. An integrated circuit usable in detecting radiation includes a plurality of readout circuits is described. A readout circuit of the plurality of readout circuits includes an integration capacitor and an averaging capacitor. The integration capacitor is coupled with a pixel of a photodetector pixel array. The pixel has a pixel area. An available area less than the pixel area is usable for layout of the integration capacitor. The integration capacitor has a capacitor area less than the available area. The averaging capacitor has an averaging capacitance greater than the integration capacitance of the integration capacitor. In some aspects, the integrated circuit further includes at least one cascaded averaging circuit coupled with the averaging capacitor.

High resolution fast framing infrared detection system

An over sampled image sensor in which the pixel size is small enough to provide spatial oversampling of the minimum blur size of the sensor optics is disclosed. Image processing to detect targets below the typical limit of 6&#xd7; the temporal noise floor is also disclosed. The apparatus is useful in detecting dimmer targets and targets at a longer range from the sensors. The inventions exploits signal processing, which allows spatial temporal filtering of the superpixel image in such manner that the Noise Equivalent Power is reduced by a means of Superpixel Filtering and Pooling, which increases the sensitivity far beyond a non-oversampled imager. Overall visual acuity is improved due to the ability to detect dimmer targets, provide better resolution of low intensity targets, and improvements in false alarm rejection.

System and method for using filtering and pixel correlation to increase sensitivity in image sensors

Detection of a target object or a characteristic of that object, e.g. temperature or movement in an image of a scene at a focal plane of the image and with processing of signals representative of the image occurring at that focal plane with a sensor and an integrated circuit processor on an imaging circuit chip used to record the scene. Moreover, processing of the signals representative of the image and the object or characteristic of the object can all be processed in parallel. This arrangement allows for filtering of objects with the ability to distinguish the object generating signals from background clutter. The incorporation of the entire circuit in this integrated circuit chip increases the compactness and efficiency. Moreover, all signal processing will occur at the focal plane eliminates the need for external processing electronics thereby increasing compactness and efficiency while reducing spatial noise.

Imaging detecting with automated sensing of an object or characteristic of that object

A circuit includes a compression sub-circuit having an input and an output for dumping excess current, a voltage bucket, and a current source. The voltage bucket, such as a capacitor, and the current source, such as a photodetector, are coupled in parallel to the input of the compression sub-circuit. Preferably, the compression sub-circuit is a single FET having a gate voltage selected to allow current to bleed off or be dumped through the FET as the capacitor approaches being full, and dumps excess photocurrent when the capacitor is full. The capacitor is nearly full when it is at least three quarters full, and is substantially full or approaching being full when it is at least 90% of capacity. In a photodetector embodiment, one plate of the capacitor is coupled to the FET and the opposed second plate is coupled to a ramping voltage circuit.

Unit cell compression circuit and method

Disclosed is a High Dynamic Range Dual Mode (HDR-DM) input circuit unit cell () for use with an infrared (IR) radiation detector (D). The readout circuit unit cell includes a plurality of transistors (M, M, Mand M), switches (S, Sand S), and capacitances (C, Cand C) that are controllably coupled together to form, in a first mode of operation below an illumination level threshold, a CTIA input circuit (), and to form, in a second mode of operation above the illumination level threshold, a lower gain SFD input circuit ().

High dynamic range dual mode charge transimpedance amplifier/source follower per detector input circuit

An analog to digital converter ADC is adapted for low power for use in an imaging array. The ADC is a digital inverter with feedback to convert an asynchronous ramp voltage to an output count at each crossing of a voltage threshold. A separate circuit generates a voltage ramp that is coupled through a capacitor to a photocurrent from a detector, generating an integrating voltage that is raised at a source follower circuit. The integrating voltage from the source follower circuit is converted to another voltage ramp and inverted at the ADC. A global count from an array of such ADCs is stored in a grey counter. The ADC is sufficiently power-efficient that each unit cell of an array of photo detectors can have its own ADC. Circuit and device-level embodiments are disclosed.

Growing community of inventors

Santa Barbara, CA, United States of America

John T Caulfield