Alcatel Lucent

Alcatel Canada Inc.

Alcatel

Alcatel-lucent Canada Inc.

John Stephan Gryba

Steve Driediger

Charles Mitchell

Simon P Whittam

Michael W Parrell

Michel Rochon

Adrian Grah

Steven G Driediger

Brian Champlin

Shadia Hijazie

Methods for reducing power dissipation from an input power source in a telecommunications system are disclosed. In one embodiment the method includes: utilizing a first I2C device to monitor an input voltage and input current to a remote unit; providing the input voltage and input current to a main microprocessor for calculating an input power; utilizing a second I2C device to monitor an output voltage and output current from the remote unit; providing the output voltage and output current to the main microprocessor for calculating an output power; calculating a power efficiency of the remote unit at the main microprocessor based on the input power and the output power; utilizing a third I2C device to provide the power efficiency of the remote unit to a digital power manager; and utilizing the digital power manager to control the DA trim output to a DC/DC converter.

Closed-loop efficiency modulation for use in network powered applications

A method and a remote device such as a sealed expansion module (SEM) for reducing power dissipation from an input power source in a telecommunications system are disclosed. A SEM contains a network feed monitor that receives an input voltage and current on twisted wire pair cables. The input voltage is then transmitted to a DC/DC converter and the voltage is adjusted and then transmitted to a BUS feed monitor connected to an active load. A first I2C device is connected to the network feed monitor to provide information related to input voltage and current to a main microprocessor that calculates input power. A second I2C device is connected to the BUS feed monitor and the active load to provide information related to the output voltage and output current to the main microprocessor that calculates output power. The main microprocessor is further connected through a third I2C device to a digital power manager that provides a DAC trim output to the DC/DC converter for optimizing the efficiency of the system.

A method and apparatus for handling, maintaining, and controlling network synchronization information emanating from a plurality of line card circuits is described. The technique described may be applied to a redundant pair of line card circuits, where one line card circuit is active, while the other is inactive. Line card activity latches are managed by means of hardware logic that may be configured at the time of line card commissioning. The activity latches are coupled to a logic element. An incoming clock signal is applied to the logic element. If an activity latch indicates that a line card circuit is active, the logic element provides the incoming clock signal as an outgoing clock signal to a control card circuit. If the activity latch indicates that the line card circuit is inactive, the logic element blocks the incoming clock signal from being passed and provides a static output level as the outgoing clock signal to the control card circuit. The control card circuit is provided with circuitry to receive the outgoing clock signals from multiple line card circuits. The circuitry is sensitive to whether or not the line card circuits are configured for redundant operation. One or more of these clock signals are then selected and used for network synchronization.

Control card circuit and method for selecting a synchronization source among a plurality of line card circuits

A system and method for closed-loop efficiency modulation for an AC/DC power system is provided. A boost-buck converter and a DC/DC converter connected in series receive a rectified DC feed signal from a AC input signal and deliver a modified DC output to an active load. A controller receives power data at various stages of the system and uses that data to modify a series of trim voltages provided to the feedback inputs of the respective converters to modify each converters output voltage. The controller modifies each converter's output voltage to maximize power efficiency while monitoring other data in the system to ensure the system is operating correctly and safely.

Closed-loop efficiency modulation for use in AC powered applications

A system for implementing time stamp related features in a real time stamp distribution system is discussed. The distribution system derives a real time stamp (RTS) at a master timekeeping network element and distributes the RTS to associated network elements by way of a number of distribution techniques. Under certain network conditions, the real time stamp may not reach one or more of the network elements at the valid real time. In the present system, the network elements are able to derive a local time based on timing information recorded at the network element. Thus the system can detect an error in the time stamp delivered to a network element and can correct the time stamp utilizing a local time stamp feature.

Feature implementation in a real time stamp distribution system

Method and apparatus for controlling a clock signal of a line card circuit

An apparatus for link layer port-based hardware implemented acceptance rate limiting control is presented. The apparatus employs a single up-down counter tracking a receive port buffer occupancy level. The single up-down counter is incremented by a receive line rate clock signal time truncated by a frame receive signal and a feedback frame acceptance control signal. The single up-down counter is decremented at an Service Level Agreement (SLA) agreed upon committed rate at which content is extracted from the receive port buffer. Outputs of comparators determining when the port receive buffer occupancy level is below a low watermark receive port buffer occupancy level, and when the receive port buffer occupancy level is above a maximum burst size, are provided to a master slave flip flop generating the frame acceptance control signal exhibiting hysteresis as the port receive buffer occupancy level transitions between the low watermark and the maximum burst size receive port buffer occupancy levels. The advantages of the link layer port-based hardware implemented acceptance rate limiting control achieved are derived from a deterministic response enforced in real time, at line rate, as content is being received employing a small number of logic gates.

Line card port protection rate limiter circuitry

Techniques for determining and verifying connectivity in an electronic device from a representation of the electronic device are disclosed. Connectivity is determined by identifying electronic components and signals in the electronic device and providing an indication of the identified electronic components and signals. Based on identified components and signals, a determination is made as to whether the electronic device satisfies one or more criteria, to thereby verify connectivity. In some embodiments, the indication provided after connectivity has been determined is subsequently used in verifying connectivity.

Electronic device connectivity analysis methods and systems

A real time stamp distribution system for multi-element/multi-processor networks. A master network element derives a real time stamp (RTS) from a source and distributes the RTS to the remaining network elements. A combination of distribution methods are discussed including a dedicated hardware connection, hardware and software messaging and a method wherein a high precision stamp is derived from an oscillator located on each network element. In one embodiment the system has a drift adjustment feature to compensate for a system time stamp drift relative to the real time. Redundancy can be provided by employing multiple master timekeeper elements. The RTS in one application has three timing components; a high precision portion; an intermediate precision portion and a low precision portion. The intermediate portion can be implemented using shifter based counters such as a linear feedback shift register. Pulse width modulated encoding and decoding can be used to transport the intermediate real time stamp from the master timekeepers to the other network elements in the system.

Growing community of inventors

Ottawa, Canada

John Stephan Gryba