Gte Automatic Electric Incorporated

Gte Automatic Electric Laboratories Incorporated

Ag Communication Systems Corporation

Gte Communication Systems Corporation

Gte Automatic Electric Labs Inc.

John S Young

William R Daniels

Han Kem

William D Blewitt

Arthur L Walsh

Peter Kruis

Robert E Renner

James B Black

James F Hoff

Lloyd A Tarr

Donovan A Bruce

Kuang-Cheng Hu

Steve A Wright

Gary Wiren

Tom Perry

Mike Gilbert

John P Taylor

Mauro Cordani

A data adapter for simultaneously providing a low speed channel, a first high speed data channel, and a second high speed channel over a two wire connection; the two wire connection connects the data adapter to a telephone system. The data adapter includes a line transceiver connected to the two-wire connection, the line interface provides a full duplex transmission link with the telephone system over the two-wire connection. A telephone interface converts data between the first high speed channel and a telephone instrument. A rate adapter converts data between the second high speed channel and a data processing equipment. A protocol controller performs a packet protocol on the low speed channel, and routes the first high speed channel to the telephone interface and the second high speed channel to the rate adapter. A processor that receives and transmits messages through the protocol controller over the low speed channel to the telephone system, and in response to information received over the low speed channel, alternatively information received from the rate adapter, the processor controls the data adapter.

Simultaneous voice and data system using the existing two-wire inter-face

A single circuit for detecting a synchronization pattern in a serial data stream. Subsequent to detecting the synchronization pattern, the single circuit generates the control signals for converting the serial data to a parallel format and loading the parallel data into a first-in-first-out (FIFO) memory. The single circuit includes a controller arranged to receive the serial data stream. A counter is connected to the controller. When the counter is detecting the synchronization pattern and the synchronization pattern is being received, the counter is incremented. Absent the synchronization pattern being received, the counter is reset to a predetermined starting point. Subsequent to detecting the synchronization pattern, the counter generates a load signal. The single circuit further includes a pulse generator arranged to receive the load signal from the counter and generate a pulse of duration equal to a bit period of the serial data stream. An indicator is provided which generates an in-synch signal after the counter detects the synchronization pattern.

Single circuit for detecting a frame synchronization pattern and

This circuit is a trunk type interface circuit which interfaces between duplicate copies of an ISDN system and T-carrier facilities. The circuit is controlled by a digital signal processor which has a 16-bit wide data bus. The digital signal processor is capable of supporting various Zero Byte Time Slot Interchange (ZBTSI) techniques. Also included is an administrative microprocessor which collects data concerning the operation of the trunk circuit and transmits this information to the ISDN system. The administrative microprocessor also receives information from currently unused data bits in the input bit stream from the ISDN system. The trunk circuit includes one receiver which collects and stores data transmitted by the ISDN system. Another receiver collects and stores data transmitted via the T-carrier facilities. The trunk circuit also includes two transmitters. One transmitter converts previously formatted data to T-carrier compatible data and transmits the data via the T-carrier facilities. the other transmitter converts reformatted data received from the T-carrier facility to data compatible with the ISDN format and transmit this data to the ISDN system. The memory of this circuit includes a dual port random access memory which provides for nearly simultaneous access by two separate input/output controllers.

ISDN interface trunk circuit

An Integrated Services Digital Network module includes a time division multiplexed switching network. Subscribers are connected to the time division multiplex network via a number of facility interface cards. These facility interface cards provide for two wire subscriber connection, four wire subscriber connection, T1 line connection and for three port conferencing arrangements. Originating and terminating multiplexers connect the facility interface cards to the time switching network. Another subsystem provides protocol interfaces for HDLC channels. Another subsystem provides interface to central office switching systems. Lastly, a general purpose computer and file computer system provide for the storage of database and form maintenance functions. Each subsystem is controlled via processor which is linked with each of the other processors by an ethernet local area network. This system provides both Primary Rate (23B+D) and Basic Rate (2B+D) interfaces to the subscribers.

Integrated services digital network module

This circuit converts data in an ISDN data format to data in a T-carrier compatible data format and vice versa. The converted data is then stored in a memory for subsequent transmission. Due to the format differences, the data may be discontinuous. This circuit stores the data in memory in a contiguous fashion to promote and to facilitate the subsequent transmission of the data. This circuit includes a timing and control arrangement which indicates the size of each channel and frame of input data. This circuit generates memory addresses for the storage of both ISDN and T-carrier formatted data which are contiguous over multiple frames of data. A counting arrangement of this circuit converts data received in a modulo 32 format to stored data in a modulo 24 format or vice versa. In addition, this circuit provides output signals for generating proper framing bits and extended superframing information.

Data format conversion circuit

An echo cancellation arrangement is provided for decreasing the 'singing' of a connection of a large number of telephone subscribers in a conference calling arrangement. This arrangement includes a means for inserting quiet code during time when the voice samples of incoming PCM data are zero or below a predetermined minimum threshold level. This helps decrease the amount of feedback which is amplified and output through the codec/filter to the listeners through the PCM network. An attenuation arrangement is also included which decreases the level of a summed signal of a summing node of the conference circuit. This sum signal is the combination of each of the conferees' speech. Attenuation of this signal prohibits excessive coupling of amplified feedback to each of the listening conferees.

Digital voice switch for a multi-port conference circuit

The present invention is an interconnection of a loop analysis test system (LATS) to a digital switching system. This arrangement includes the utilization of existing network units to establish a path connection from the computer of a LATS system to a measuring unit of the LATS system. This path through the digital switching system provides for the appropriate signaling requirements in order to simulate a telephone call to the digital switching system for connection to a subscriber. Another path is provided to connect the measuring unit to the subscriber line to be tested via a special access network. In addition, this arrangement includes a data base in the CPU switching system to provide for determining whether the connection of this path through the switching system is for a test access or for normal calling functions. The data base also records the interconnection of equipment such that the proper subscriber's line may be accessed when called by the LATS system.

Arrangement for loop analysis testing for a digital switching system

The present invention is an interconnection of a loop analysis test system (LATS) to a digital switching system. This arrangement includes the utilization of existing network units to establish a path connection from the computer of a LATS system to a measuring unit of the LATS system. This path through the digital switching system provides for the appropriate signaling requirements in order to simulate a telephone call to the digital switching system for connection to a subscriber. In addition, this arrangement includes a data base in the CPU switching system to provide for determining whether the connection of this path through the switching system is for a test access or for normal calling functions. The data base also records the interconnection of equipment such that the proper subscriber's line may be accessed when called by the LATS system.

Arrangement for facilitating external loop analysis testing for a

A ringing generator testing arrangement for a digital telephone network is shown comprising a zero crossing detector connected to the ring lead of a line circuit under test. The zero crossing detector gates a clock signal into a counter circuit during the negative to positive transition of the ringing generator signal positive half cycle. The counter circuit advances until the next positive to negative transition of the ringing generator signal. At this time, the zero crossing detector cuts off the clock signal and the counter circuit transmits to a central control complex a count representing a measured interval of the ringing generator positive half cycle.

Ringing generator testing arrangement for a digital telephone network

An arrangement for testing a plurality of subscriber lines, which are operationally connected to an electromechanical switching system is shown. Operational service is to be transferred from the electromechanical switching system to a digital switching system. This arrangement provides for automatically verifying the connection of the subscriber lines to the digital switching system and determining whether the proper ring signalling is transmitted to each subscriber.

Arrangement for subscriber line verification and ring testing

An arrangement for testing a single subscriber line, which is operationally connected to an electromechanical switching system is shown. Operational service is to be transferred from the electromechanical switching system to a digital switching system. The arrangement provides for isolating subscribers which share common line equipment, for verifying the subscriber's line and its ringing characteristics.

Arrangement for single line testing

An arrangement for automatically testing a plurality of subscriber lines, which are operationally connected to an electromechanical switching system is shown. Operational service is to be transferred from the electromechanical switching system to a digital switching system. This arrangement provides for automatically verifying whether the digital switching system is applying the proper ringing signal to each subscriber by a comparison with that applied by the electromechanical switching system.

Arrangement for subscriber line ring testing

A system is shown for automatically detecting the integrity of telephone subscriber's line connection to a four wire switching system via a hybrid network.

Apparatus for controlling and indicating the integrity of the connection

A digitally activated ringing circuit for use in conjunction with a central processing unit of an electronic telephone central office is connected between the central processing unit and a telephone subscriber via the central office switching network. The ringing circuit generates an analog signal representing a particular one of a plurality of possible ringing frequencies to be applied to the subscriber line. The instantaneous values of the ringing signal are approximated by information contained within a read only memory.

Digitally activated ringing circuit for generation of AC voltages

A digitally activated coin control circuit for use in combination with a digitally activated ringing circuit for common manipulation of a prepaid coin station by a central processing unit of a telephone switching center to collect and alternatively to refund deposited coins.

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Scottsdale, AZ, United States of America

John S Young