Ericsson Gmbh

John S Petty

Robert Ray Horton

Randy Morse Villeneuve

William Tolbert

Anthony D Walker

I Nelson Wakefield

Srinivas G Sarma

Roger J Osborn, Jr

Richard P Fahey

Apparatus for electrically coupling a first digital device () and a second digital device () includes an interface circuit at the first digital device coupled at an interface node () to the second digital device. The interface circuit is configured to provide a first device supply voltage (Vcc) to the interface node until a second device supply voltage (Vcc) at the interface node exceeds the first voltage. A data circuit () at the first digital device is coupled to the interface node. The data circuit is responsive to voltage on the interface node for providing digital logic signals at appropriate voltage levels to the second digital device.

Method and apparatus for electrically coupling digital devices

A method and apparatus is described for the sequential display of status information on a mobile terminal by means of a rotating-icon. The operating condition of the mobile terminal is monitored and a plurality of status icons is selected and sequentially displayed for a predetermined time in substantially the same area of at least one screen such as a pixel screen. The predetermined time corresponds to M&plus;(PV/S), where M is the minimum display time for each status icon, P is the priority allocated to a status icon about to be displayed in the at least one screen, S is the sum of all the priorities of the status icons in the selected plurality of status icons, and V&equals;T&minus;MN, where T is the total period of time allocated to sequentially display the selected plurality of status icons, and N is the number of status icons in the selected plurality of status icons. The mobile terminal includes a housing, at least one screen, a memory, a timer, a plurality of operating parameter detectors, and a processor. The processor is operably coupled to the at least one screen, memory, the plurality of operating parameter detectors, and the timer; the processor is responsive to the plurality of operating parameter detectors and selects appropriate status icons for sequential display in the at least one screen.

Apparatus and method for compact icon display

A system and method for updating software for a remote unit over a network is disclosed herein. The system and method includes the remote unit, an authentication server and an update server. The remote unit may have a flasher host for communicating over the network and for transmitting commands to the remote unit. The system and method allows for the verification of a request message from the remote unit, and a response from the authentication server. The response message to the remote unit from the authentication server will contain an decryption key to decrypt the update file that will be sent by the update server. Such an authentication process prevents rogue programs from being sent to the remote unit thereby decreasing the potential for cellular fraud.

System for secure controlled electronic memory updates via networks

Apparatus for electrically coupling a first digital device ( ) and a second digital device ( ) includes an interface circuit at the first digital device coupled at an interface node ( ) to the second digital device. The interface circuit is configured to provide a first device supply voltage (Vcc ) to the interface node until a second device supply voltage (Vcc) at the interface node exceeds the first voltage. A data circuit ( ) at the first digital device is coupled to the interface node. The data circuit is responsive to voltage on the interface node for providing digital logic signals at appropriate voltage levels to the second digital device.

A method and apparatus multiplexes pins of a PC card ( ) to provide communication of two-way, high quality audio data between the PC card and a host computer ( ) over a conventional PC card connector. The PC card includes one or more signal drivers ( ), each signal driver coupled to a unidirectional signal line conventionally conveying address data from the host computer to the PC card. The signal drivers are configured to provide data signals to the signal line for communication to the host computer in an active mode and to enter a high impedance state in an inactive mode in response to a control signal received at a control input ( ).

Multiplexing pins of a PC card for providing audio communication between the PC card and host computer

Electromagnetic shielding devices are provided that can be easily modified in shape and configuration to facilitate electronic device development. An electronic substrate includes a surface and a ground trace extending along the surface to define a perimeter of an area of the electronic substrate to be shielded. A plurality of electrically conductive block members are electrically secured to the ground trace in adjacent relationship. An electrically conductive cover is electrically secured to a top face of each of the block members to overlie the area of the electronic surface to be shielded.

Shielding apparatus for electronic devices

Systems and methods of obtaining status information from PCMCIA cards installed within host computers are provided. A PCMCIA card includes a processor having a static random access memory (SRAM) attribute memory address space implemented therewithin. The SRAM attribute memory address space includes a Card Information Structure (CIS) that is readable by the host computer. Owner control signals provide an indication of ownership of the SRAM attribute memory address space. A host computer reads PCMCIA card status information from a CIS when an owner control signal indicates host computer ownership of the SRAM attribute memory address space. A host computer is prevented from reading status information from a CIS when an owner control signal indicates PCMCIA card processor ownership of a SRAM attribute memory address space.

Systems and methods for transferring PCMCIA card status information to host devices

A clock circuit includes a clock signal generator for generating a first clock signal during a normal mode of operation and an oscillating dual clock generating circuit for producing a second clock signal during a second mode of operation. The oscillating dual clock generating circuit is connected to the output of the clock signal generator. In the first mode of operation, the clock signal from the clock signal generator is passed through the oscillating dual clock generating circuit to a control device. In a second mode of operation, the input of the oscillating research signal is isolated. Isolation of the oscillating dual clock generating circuit causes oscillation in the dual clock generating circuit. Thus, the dual clock generating circuit acts as an oscillator during the second mode of operation to generate a second clock signal.

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Chapel Hill, NC, United States of America

John S Petty