Adaptec, Inc.

Stmicroelectronics N.v.

Stmicroelectronics Gmbh

John S Packer

Fred A Kool

Marc Spitzer

Ross John Stenfort

Lawrence J Lamers

Eric C Erickson

B Arlen Young

Douglas C Lee

Charles A Monia

Wei Chuan Goh

Steven D Wilson

Fanyun (Michelle) Kong

Nicholas S Assouad

A method for generating hardware description language source files is provided. The method includes extracting an input/output (I/O) list and building a port list declaration file from the I/O list. The method also includes building a default instantiation file according to renaming rules and interpreting coding constructs to determine both variable types and sizes. The method further includes generating a sensitivity list.

Automatic generators for verilog programming

ASIC functional specification parser

A method for sharing a buffer among multiple context engines, is provided. The method includes loading a memory element with a first data sequence. The method further includes loading a corresponding first context information to one of the multiple context engines. Subsequently, a direct memory access engine is loaded with the first data sequence dictated by the first context information. Then, the first data sequence is processed. While the first data sequence is being processed, the method includes loading the context engine with a next context information for a next data sequence contemporaneously with the processing of the first data sequence.

Method and system for sharing a receive buffer RAM with a single DMA engine among multiple context engines

Broadly speaking, an apparatus and associated method of operation is provided for controlling alignment signal transmission in an electronic communication process. More specifically, a programmable control is provided for controlling transmission of alignment signals in either a Serial Attached SCSI (SAS) or Serial ATA (SATA) communication process. The programmable control includes a counter operated to sequentially modify a count value. When the count value is equal to a programmed alignment trigger value, the programmable control is configured to generate and transmit an alignment signal through the initiator transceiver to the target transceiver. Thus, the apparatus and associated method of operation controls a rate at which alignment signals are transmitted in a SAS/SATA communication process.

Alignment signal control apparatus and method for operating the same

A system and method for testing a development device includes extracting multiple parameters of the development device from a product specification for the development device. The parameters being arranged in a predetermined first order. The parameters are stored in a testing data file. The testing data file can be input into a test bench system being coupled to the development device. The test bench system can test the development device.

System and method for automatic extraction of testing information from a functional specification

A method and associated apparatus is provided for operating an electronic device in accordance with a wired endian format. More specifically, the wired endian format requires multi-byte values be maintained in transmit order. The wired endian format is defined to allow for interfacing with both a big endian format and a little endian format. Thus, a device operating in accordance with the wired endian format is able to interface with both a device operating in accordance with the big endian format (e.g., a Serial Attached SCSI (SAS) device) and a device operating in accordance with the little endian format (e.g., a Serial ATA (SATA) device). Furthermore, since the device operating in accordance with wired endian format implements circuitry compliant with the wired endian format, duplication of circuitry to define separate data paths for interfacing with the big endian and little endian formats, respectively, is avoided.

Wired endian method and apparatus for performing the same

A SCSI message manipulation circuit in a SCSI expander detects a specified SCSI message from either a SCSI initiator, or a SCSI target. After detecting the specified SCSI message, the SCSI message manipulation circuit detects a pre-selected message-unit, e.g., a specific byte, within the message. Upon detecting the pre-selected message unit, the SCSI message manipulation circuit sets a pre-selected sub-unit, e.g., a bit, within the pre-selected message-unit to a state, which is programmable, as the SCSI message passes through the SCSI expander.

Hardware circuit and method for automatically configuring on-the-fly a sub-unit in a SCSI message

An expander device and method for isolating bus segments from one another in an I/O subsystem. The expander device is arranged to couple the bus segments for communication in the I/O subsystem. The expander device includes a first I/O interface circuit, a second I/O interface circuit, and an expander controller. The first I/O interface circuit is configured to be coupled to a first bus segment and is adapted to interface input and output communication signals with the first bus segment. The second I/O interface circuit is configured to be coupled to a second bus segment and is adapted to interface the input and output communication signals with the second bus segment. The expander controller is coupled to communicate the input and output communication signals between the first and second I/O interface circuits. The expander controller is further arranged to control communication between the bus segments and includes a segment controller adapted to generate a first signal. The segment controller provides the first signal to the first and second I/O interface circuits to disable output of the communication signals from the first and second I/O interface circuits to the first and second bus segments.

Expander device for isolating bus segments in I/O subsystem

Expander device and method for resetting bus segments in I/O subsystem to clear bus hang in an I/O subsystem having a plurality of bus segments. Each bus segment in the I/O subsystem includes a set of devices and a bus that is coupled to the set of devices. In addition, the I/O subsystem includes at least one expander, each expander being arranged to couple a pair of buses for propagating communication signals. A reset signal is asserted on a first bus segment. In response to the reset signal, each expander coupled to the first bus segment and each device in the first bus segment reset themselves. Additionally, each expander coupled to the first bus segment isolates the reset signal such that the reset signal is not propagated to the other bus segments. For each expander coupled to the first bus segment, all communication signals are isolated such that each expander prevents propagation of the communication signals between the first bus and other bus. Then, it is determined whether the other bus is no longer hung for each expander coupled to the first bus segment. If the other bus is still hung, each expander issues a far-side reset signal on the other bus to reset the other bus. However, if the other bus is not hung, communication signals are allowed to propagate between the first bus and the other bus.

Expander device and method for resetting bus segments in I/O subsystem segmented with expanders

The present invention provides methods for automatically discovering topology map of an I/O subsystem. The I/O subsystem is coupled to one or more host computers and includes one or more peripheral buses, a set of peripheral devices, and a set of expanders with each expander having a valid expander address and being arranged to couple a pair of the peripheral buses. The peripheral devices and the one or more host computers are coupled to the peripheral buses. A host computer selects a peripheral device as a target device and writes a set of entries to the selected target device. Each entry written an expander address field initialized to an invalid expander address for storing an expander address. The host computer then selects the target device and reads the set of entries from the target device. For each expander coupled between the host computer and the target device, the valid expander address associated with the each expander is assigned to one of the expander address fields in the set of entries that contain invalid expander addresses. The host computer receives the set of entries such that the set of the valid expander addresses in the set of entries indicates identity of associated expanders coupled between the host computer and the target device. These operation are repeated for each of the other peripheral devices as the target device so as to discover the topology map of the entire I/O subsystem.

I/O subsystem topology discovery method

A SCSI selective options message delay expander includes a capability for monitoring messages transferred between a first port and a second port of the expander, for delaying a pre-selected message, for modifying the delayed pre-selected message, and for storing information obtained from the delayed pre-selected message. The ability to change messages allows the expander to be used with SCSI initiators and/or SCSI target devices that have SCSI characteristics different from the SCSI characteristics of the expander.

Structure and method for message snooping in SCSI bus expanders

The present invention provides methods for automatically assigning addresses to expanders in a computer I/O subsystem that is coupled to one or more host computers. The computer I/O subsystem includes one or more peripheral buses, a set of peripheral devices, and a set of expanders with each expander being arranged to couple a pair of peripheral buses. The peripheral devices are coupled to the peripheral buses. In this configuration, a host computer selects a peripheral device as a target device and writes an address data pattern to the selected target device. The host computer then selects the target device and reads the address data pattern from the target device. Unique addresses are then assigned to one or more expanders coupling the host computer and the target device starting from the address data pattern, preferably by incrementing the address data pattern.

Automatic addressing of expanders in I/O subsystem

The present invention provides a method for assigning addresses to expanded devices in a computer I/O subsystem, which has one or more buses. Each bus has an N-bit data bus for communication. One or more types of expanded devices are provided in the computer I/O subsystem and are coupled to one or more peripheral buses. An expanded address space is defined for the one or more types of expanded devices by partitioning an N-bit data bus into a pair of fields that includes an expanded ID field and an expanded signature field. An address is assigned to each of the expanded devices by assigning an expanded signature to each type of the expanded devices. In addition, an expanded ID is assigned to each expanded device within each type of the expanded devices, wherein more than two bits are asserted in the address.

Methods for assigning addresses to expanded devices in I/O subsystem

Write and read processes for a disk drive handle data and overhead fields in a data frame that extends between two servo sectors on a disk. A write process fills a buffer with both data values and overhead values sufficient to fill a data frame and then writes the entire data frame based on the values in the buffer. Accordingly, activation of a separate formatting circuit is not required as those fields are written, and the write operation does not require sector pulses to control the timing for writing individual data sectors in the data frame. The overhead fields written include VFO fields and data synchronization fields. The read process uses timing signals derived from detection of servo sectors and data synchronization fields but otherwise sequentially reads data and overhead fields and transfers those fields to a buffer. The data in a requested sector can be separated from overhead information and data of other sectors in the buffer, when the disk drive outputs the requested data.

Data frame write and read processes

Disclosed is a disc drive system that includes a digital signal processor for processing information sectors read from a CD media. The digital signal processor is configured to parse the information sectors into data frames and subcode frames. A data auto-start unit for triggering a data transfer to a buffer memory when a desired data frame is detected. A subcode auto-start unit for triggering a subcode transfer to the buffer memory when a desired subcode frame is detected. Preferably, the desired data frame and the desired subcode frame have a same MSF. The disc drive system further includes a buffer manager having a plurality of counters that are configured to track the number of data frames and the number of subcode frames being transferred to the buffer memory, and releasing a block including one of the data frames and one of the subcode frames when the counters indicate that the block is complete.

Growing community of inventors

Milpitas, CA, United States of America

John S Packer