Stratus Technologies Bermuda Ltd.

Stratus Technologies Ireland Ltd.

John Rogers MacLeod

Steven Michael Haid

Lei Cao

John W Edwards, Jr

Mark Tetreault

Stephen J Wark

Angel L Pagan

Nathaniel Horwitch Dailey

Andrew Alden

Wendy J McNaughton

Michael W Kement

Charles J Horvath

Mohsen Dolaty

Robert E Nelvin

A method and apparatus of performing fault tolerance in a fault tolerant computer system comprising: a primary node having a primary node processor; a secondary node having a secondary node processor, each node further comprising a respective memory; a respective checkpoint shim; each of the primary and secondary node further comprising: a respective non-virtual operating system (OS), the non-virtual OS comprising a respective; network driver; storage driver; and checkpoint engine; the method comprising the steps of: acting upon a request from a client by the respective OS of the primary and the secondary node, comparing the result obtained by the OS of the primary node and the secondary node by the network driver of the primary node for similarity, and if the comparison of indicates similarity less than a predetermined amount, the primary node network driver informs the primary node checkpoint engine to begin a checkpoint process.

Operating system-based systems and method of achieving fault tolerance

A method of transferring memory from an active to a standby memory in an FT Server system. The method includes the steps of: reserving a portion of memory using BIOS; loading and initializing an FT Kernel Mode Driver; loading and initializing an FT Virtual Machine Manager (FTVMM) including the Second Level Address Translation table SLAT into the reserved memory. In another embodiment, the method includes tracking memory accesses using the FTVMM's SLAT in Reserved Memory and tracking 'L' Guest memory accesses by tracking the current Guest's SLAT and intercepting the Hypervisor's writes to the SLAT. In yet another embodiment, the method includes entering Brownout by collecting the D-Bits; invalidating the processor's cached SLAT translation entries, and copying the dirtied pages from the active memory to memory in the second Subsystem. In one embodiment, the method includes entering Blackout and moving the final dirty pages from active to the mirror memory.

Method for dirty-page tracking and full memory mirroring redundancy in a fault-tolerant server

A method and apparatus for input/output virtual address translation and validation assigns a range of memory to a device driver for its exclusive use. The device driver invokes system functionality for receiving a logical address and outputting a physical address having a length greater than the logical address. Another feature of the invention is a computer system providing input/output virtual address translation and validation for at least one peripheral device. In one embodiment, the computer system includes a scatter-gather table, an input/output virtual address cache memory associated with at least one peripheral device, and at least one device driver. In a further embodiment, the input/output virtual address cache memory includes an address validation cache and an address translation cache.

Caching for I/O virtual address translation and validation using device drivers

The inventive system essentially hides redundant paths to the peripheral devices from the operating system, by reporting a single &ldquo;virtual&rdquo; path to the peripheral busses over PCI bus . The virtual path includes at least a virtual peripheral bus controller and a virtual video controller. The system also tells the operating system that the real controllers are on another PCI bus on an opposite side of a PCI-to-PCI bridge connected also to PCI bus . An I/O system manager selects one of the actual paths, which may, but need not, be connected to PCI bus , to handle communications with the peripheral devices. The I/O system manager maintains the controllers on the unselected path in an off-line or standby mode, in case of a failure of one or more of the controllers on the selected path. If a failure occurs, the I/O system manager performs a fail-over operation to change the selection of controllers, and the peripheral devices continue to operate in the same manner on the peripheral busses. The operating system does not respond to the controller failure by declaring a system failure, however, because the operating system continues to look to the virtual path, with its virtual controllers, as a valid path to the peripheral devices. The system also allows hot swapping of PCI bridges, through FET isolation of the unselected controllers. The devices on the PCI bus and the peripheral busses may also be hot swapped through selective FET isolation.

System and method for operating a system with redundant peripheral bus controllers

Growing community of inventors

Cambridge, MA, United States of America

John Rogers MacLeod