Cirrus Logic Inc.

Lattice Semiconductor Corporation

John Robert Pacourek

Jeffrey A Niehaus

James S Divine

Baker P Scott

Raghunath Krishna Rao

Vishnu Shankar Srinivasan

John James Paulos

Miroslav V Dokic

Zheng Luo

Baker Scott, Iii

Frederic Deboes

Terry Ritchie

Tom Cook

Systems and methods are disclosed herein to provide analog-to-digital interface techniques. For example, in accordance with an embodiment of the present invention, an integrated circuit includes an offset cancellation circuit provides offset cancellation for input signal paths under control of at least a first clock signal. A comparator, coupled to the offset cancellation circuit, provides an output signal based on a comparison of input signals provided on the input signal paths. A register receives the output signal and provides the output signal to a digital circuit under control of a first control signal, wherein the at least first clock signal is synchronized to a clock signal of the digital circuit.

Analog-to-digital systems and methods

A method and system for controlling a tuning voltage of a phase-locked loop circuit to an optimal value are disclosed. Minimum and maximum bias current values are defined for a bias current from the linear control loop circuit. The linear control loop circuit is coupled to the phase-locked loop circuit. The linear control loop circuit infinitely varies a current value for a current-controlled oscillator of the phase-locked loop circuit. The current value is based on a tuning current of the phase-locked loop circuit and the bias current. The bias current infinitely varies in value between the minimum bias current value and the maximum bias current value to direct the tuning voltage to an optimal value. The phase-locked loop circuit includes a phase detector, a filter, a voltage-to-current converter, a current adder, and the current-controlled oscillator coupled together in series. The linear control loop circuit is an analog, voltage control loop that has a voltage summer, another filter, and another voltage-to-current converter coupled together in series. A reference voltage and the tuning voltage are inputted into the voltage summer, and a bias current is outputted and injected from the other voltage-to-current converter into the tuning current. The other voltage-to-current converter has a sufficient gain to provide the bias current between the minimum bias current value and the maximum bias current value. The linear control loop circuit is designed with a time constant characteristic that is slower than another time constant characteristic of the phase-locked loop circuit.

Method and system for controlling a tuning voltage of a phase-locked loop circuit to an optimal value

A technique for compensating for supply voltage variations in a delay circuit by utilizing a bias circuit to maintain the delay substantially constant with respect to the supply voltage. The bias circuit generates a bias current having a fixed component and a variable component, in which the variable component varies proportionately to variations in the supply voltage to maintain the delay substantially constant.

Open loop supply independent digital/logic delay circuit

An audio decoder 100 for operating on a received compressed audio data stream compressed using an algorithm employing transform encoding and a bit allocation routine. A first processor 200 performs a first set of operations on the received compressed audio data stream including parsing the compressed audio data stream, recovering data fields within the compressed audio data stream, calculating a bit allocation, and passing frequency domain coefficients to shared memory. A second digital signal processor 100b performs a second set of operations on data passed from the first digital signal processor to shared memory including performing inverse transform operations on the data passed from the first digital signal processor.

Dual processor digital audio decoder with shared memory data transfer

A voltage controlled oscillator with bias current calibration includes a voltage controlled oscillator 1504. A tuning current source 1510 is coupled to oscillator 1504 in parallel with bias current source 1512 for providing a tuning current to oscillator 1504. A selected control voltage is provided by oscillator 1504 for setting an oscillator output frequency. Control circuitry 1513, 1514 allows adjusting of the tuning current source to optimize bias current.

Bias current calibration of voltage controlled oscillator

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Austin, TX, United States of America

John Robert Pacourek