International Business Machines Corporation

Globalfoundries Inc.

Lenovo (singapore) Pte. Ltd.

John Richard Dangler

Matthew Stephen Doyle

Thomas W Liang

Layne A Berge

David Clifford Long

David J Braun

Theron Lee Lewis

Manuel Orozco

Jason J Bjorgaard

Kyle Schoneck

James A Busby

Timothy P Younger

Matthew A Walther

Stephen Michael Hugo

James D Bielick

Michael J Fisher

Jennifer I Bennett

Thomas Donald Kidd

William Louis Brodsky

Phillip Duane Isaacs

Michael T Peets

William Santiago-Fernandez

Timothy Jennings

Arthur J Higby

Jesse Hefner

Kevin Albert Splittstoesser

Brian L Carlson

Roger Scott Krabbenhoft

Joseph Paul Kuczynski

Edward N Cohen

Jason Thomas Stoll

Tim Bartsch

Darcy Berger

Gerald Keith Bartley

Arvind Kumar Sinha

Mark Kenneth Hoffmeyer

Silvio Dragone

Mark Garrison Clark

Zachary Thomas Dreiss

Philipp K Buchling Rego

Alexandra Echegaray

Kathleen Ann Fadden

Thomas Weiss

Miles Frank Swain

Colin Edward Masterson

David T Nelson

Austin Carter

Jeffrey A Taylor

Gunnar Mills

Emmanuel Atta

Levi A Campbell

Timothy Jerome Tofil

Russell Alan Budd

Darryl John Becker

Stefano Sergio Oggioni

Roger Allen Booth, Jr

Paul Eric Dahlen

Mark James Jeanson

Matthew Stephen Kelly

Trevor Joseph Timpane

Paul William Rudrud

Jeffrey N Judd

Ryan Elsasser

Robert L Weiss

William Santiago Fernandez

Kevin J Przybylski

Timothy L McMillan

Ankur Kanu Patel

Henry Michael Newshutz

Donald R Thomas

Bradley Lewis Martin

Jeffrey Willoughby

Rorie Paul Reyes

Thomas A Haselhorst

Eric Nguyen Phan

Timothy A Bartsch

Tory Johnson

Andrew Cm Hicks

Lauren Boston

Hannah Wendling

William Santiago-fernandez

Donald Thomas

Kevin Randolph

Emily Wise

Paul V Abrahamson

Milcah Ntende

Daniel Lee Dawiedczyk

Nicholas Zapotoski

In accordance with a technique of parallelized computer system testing, a processor develops, on a representative computer system, a plurality of groups of system tests based on test-ordering constraints, where the system tests in each of the plurality of groups are executable in a temporally overlapping manner. The processor applies a test suite including a sequence of multiple of the plurality of groups of system tests to a production computer system. Applying the test suite includes performing the system tests in each of multiple of the plurality of tests groups in a temporally overlapping manner, such that testing efficiency is improved.

Computer system test parallelization

A structure of a circuitry substrate for securing an area from tampering is disclosed. The structure includes a circuitry substrate with at least one of a top tamper enclosure and a bottom tamper enclosure covering a component in a protected area of the circuitry substrate. The top and bottom tamper enclosures are adhesively bonded to a surface of the circuitry substrate, and a tear initiation site is added to a side of the perimeter of circuitry substrate bordering the protected area that includes at least one tamper enclosure, such that the tear initiation site is located and configured to enable propagation of a delamination of at least one internal layer of the circuitry substrate and a severing of a security circuit when a removal force is applied to the at least one of the top tamper enclosure and the bottom tamper enclosure.

Tearing security feature of printed circuit substrates

One or more devices and/or methods provided herein relate to a method for fabricating a filtering electronic device having a co-integrated impedance modification element and signal transmission line. An electronic structure can comprise a signal transmission line, and an impedance modification element adjacent to and external to the signal transmission line, wherein the impedance modification element comprises a structure having differentiated sections, along the signal transmission line, that provide corresponding differentiated impedances. In an embodiment, the impedance modification element can comprise a plurality of impedance sub-elements spaced apart from one another along and adjacent to the signal transmission line to facilitate the different impedances.

Field-adjustable flex circuit transmission line filters

A system and method for slowing a vehicle. Road conditions around the vehicle are monitored, and determined if those road conditions are hazardous. An engine control unit is informed of the hazardous road conditions and alters the operation of the engine control unit in response to the hazardous road conditions. When an operator of the vehicle desires to slow the vehicle down, an indication is received indicating the intent to slow the vehicle down. The vehicle is then slowed based upon the altered operation of the engine control unit by applying a vacuum to increase a manifold vacuum of the engine.

Intelligent advanced engine braking system

A method of fabricating a multilayer circuit board is provided which includes forming a layer of a the multilayer circuit board with an internal clearance region having a modified voltage-to-ground clearance of conductive material adjacent to an aperture of the multilayer circuit board. The modified voltage-to-ground clearance of conductive material is based on a configuration of a connector pin to be press-fit connected within the aperture of the multilayer circuit board, and the internal clearance region is enlarged in a direction of greatest normal force outward from the aperture with insertion of the connector pin into the aperture.

Modified internal clearance(s) at connector pin aperture(s) of a circuit board

Electrical current flow in a ball grid array (BGA) package can be measured by an apparatus including an integrated circuit (IC) electrically connected to the BGA package. Solder balls connect the BGA package to a printed circuit board (PCB) and are arranged to provide a contiguous channel for a current sense wire. A subset of solder balls is electrically connected to supply current from the PCB through the BGA package to the IC. The current sense wire is attached to the upper surface of the PCB, within the contiguous channel, and surrounds the subset of solder balls. An amplifier is electrically connected to the current sense wire ends to amplify a voltage induced on the current sense wire by current flow into the BGA package. A sensing analog-to-digital converter (ADC) is electrically connected to convert a voltage at the output of the amplifier into digital output signals.

Ball grid array current meter with a current sense wire

A system, apparatus, and method for determining ultrasonic vital product data of coaxial cables and side-band communications through a water medium of a water-cooling system and/or apparatus. The system may include a first electronic device. The system may also include a second electronic device. The system may also include one or more cables running between the first electronic device and the second electronic device. The system may also include a water jacket filled with water encasing the one or more cables. The system may also include one or more transducers connected to the water jacket, the one or more transducers configured to send signals through the water to gather information about each cable. The system may also include a computer system connected to the one or more transducers, where the computer system is configured to control the one or more transducers.

Sonar scanning water cooled coaxial cables

A first apparatus includes an electrical connector with an outer shell and an inner wafer, where the inner wafer is configured to slide into a cavity of the outer shell. The first apparatus further includes a shape-memory alloy coupled to a void in the outer shell and configured to interfere with an area on the inner wafer. A second apparatus includes an OTS connector with an outer shell and an inner wafer, where the inner wafer is configured to slide into a cavity of the outer shell. The second apparatus further includes a plurality of SMT leads of the inner wafer configured to mount onto a plurality of landing pads on a PCBA. The second apparatus includes a shape-memory alloy coupled to a void in the outer shell and configured to interfere with the inner wafer preventing movement of the inner wafer within the outer shell of OTS connector.

Shape-memory alloy lock for connectors

An approach for connecting electrical wiring between two chambers of varying temperatures is disclosed. One approach includes a first end of a wiring bundle comprising a first plurality of metal conductors; a second end of the wiring bundle comprising of equal number of metal conductors as the first end of the wiring bundle; the first end of the wiring bundle is separated by an air gap from the second end of the wiring bundle at a first temperature; and an insulator surrounding the wire bundle. Another approach includes the use of one or more SMA (shape-memory alloy) pins connecting the first end of the wiring bundle to the second end of the wiring bundle and that is separated by an air gap and a boundary plate.

Cryogenic chamber connector

Embodiments are directed to short and/or near short etch rework. A microfluidic device is positioned on a portion of a circuit having a defect. The microfluidic device is caused to dispense etchant that removes the defect of the circuit, where a flow of the etchant is controlled to access the portion of the circuit having the defect to thereby etch away the defect, the flow of the etchant being obstructed from accessing other portions of the circuit. The microfluidic device is used to extract the etchant from the portion of the circuit such that the etchant avoids contact with the other portions of the circuit. The microfluidic device is removed from the circuit.

Short or near short etch rework

Aspects include a cryptographic hardware security module having a secure embedded heat pipe and methods for assembling the same. The cryptographic hardware security module can include a printed circuit board having one or more components. The cryptographic hardware security module can further include an encapsulation structure having a top can and a bottom can. The top can is fixed to a first surface of the printed circuit board and the bottom can is fixed to second surface of the printed circuit board opposite the first surface. A heat pipe is positioned between the top can and the component. The heat pipe includes two or more 180-degree bends. A portion of the heat pipe extends beyond a secure region of the encapsulation structure.

Cryptographic hardware security module with secure embedded heat pipe

A ball-grid-array component of a ball-grid array assembly is analyzed prior to reflow. A predicted warping pattern of the ball-grid-array component that is likely to occur during reflow is predicted based on the analyzing. A solder ball ball-grid-array defect that could be caused by the predicted warping pattern is predicted. An initial via suction pattern to mitigate the ball-grid-array defect is assigned. A vacuum head is applied to a via in the ball-grid-array assembly. The solder ball is located at the opposite end of the via from the vacuum head. Suction is applied to the via based on the via suction pattern. The suction draws a portion of the solder ball into the via during reflow.

Vacuum-assisted BGA joint formation

A set of features for a product is identified. It is determined that preventing an electrical connection at a ball-grid-array location on a ball-grid-array assembly of the product would result in the set of features. The ball-grid-array location is established as a target BGA location based on that determination. Suction is applied to a via at the target BGA location during reflow of the ball-grid-array assembly. With that application of suction, a solder ball at the target BGA location is drawn into the via.

Feature selection through solder-ball population

A temperature-dependent capacitor comprises a first conductive plate, a second conductive plate located in a parallel-planar orientation to the first conductive plate, and a dielectric material located between the first conductive plate and the second conductive plate, the dielectric material having a temperature-dependent dielectric constant (ε) value, wherein the temperature-dependent capacitor has a positive correlation of an operating temperature of the temperature-dependent capacitor to a capacitance value of the temperature-dependent capacitor.

Temperature-dependent capacitor

Aspects include a hybrid socket dynamic warp indicator for socket connector systems and methods of using the same to measure the warpage of a printed circuit board assembly. The method can include providing a printed circuit board having a plurality of pads and a socket. A warp indicator having a plurality of solder joint connections and a resistor array is electrically coupled to the printed circuit board to build a printed circuit board assembly. The printed circuit board assembly is subjected to a thermal event. A resistance across the resistor array is measured after the thermal event. A number of separations between one or more pads of the printed circuit board and one or more solder joint connections of the warp indicator is determined based on a change in the resistance. A defective warpage condition for the socket is determined based on the number of separations.

Hybrid socket warp indicator

Growing community of inventors

Rochester, MN, United States of America

John Richard Dangler