Physio-control, Inc.

The Boeing Company

Physio-control Manufacturing Corporation

John R Stice

Dennis R Seguine

Stephen P LaBrash

An analog to digital converter for input signals having a low frequency component (such as DC) upon which is superimposed an AC component, the magnitude of the AC component being less than or equal to one-half the span of the analog to digital converter.

Analog to digital converter utilizing resolution enhancement

A method and apparatus for monitoring an electrocardiograph waveform, and for returning an electrocardiograph trace to the middle of a display, such as a chart recorder strip. The monitoring circuit includes an amplifier and a switch for switching the frequency response curve of the monitoring circuit. In a first position, the switch causes the monitoring circuit to have a slow frequency response curve, which allows for accurate monitoring of ECG waveforms. In a second position, the switch causes the monitoring circuit to have a fast frequency response curve, which allows the amplifier of the monitoring circuit to quickly be brought out of saturation. The amplifier of the monitoring circuit becomes saturated when a defibrillation or pace pulse has been applied to a patient who is being monitored. The switch is controlled by a pulse waveform control signal that is provided by a microprocessor. By varying the duty cycle of the control signal, the frequency response curve of the monitoring circuit can be shifted. By changing the duty cycle of the pulse waveform in incremental steps, certain problems can be avoided, such as erroneous QRS detect marks that are otherwise produced. The incremental steps in which the duty cycle of the pulse waveform is changed may be predetermined, or they may be adjusted according to feedback from the amplifier.

Digital sliding pole fast-restore for an electrocardiograph display

A differential lead impedance comparison apparatus (10) senses lead impedance and compensates for patient-to-patient and electrode variability. A bridge circuit (12) is connected to one end of electrode conductors (22, 24 and 26) in an ECG Leads I configuration. The other end of the conductors (22, 24 and 26) are connected to a patient (18) via electrodes (RA, LA and LL). Leads formed in part by RA, LA and LL and the respective conductors (22, 24 and 26) have lead impedances (R.sub.b, R.sub.a, and R.sub.c). Constant current sources (11, 12 and 13) are connected to the conductors (22, 24 and 26) and supply constant AC currents (I.sub.1, I.sub.2 and I.sub.3). A first bridge output voltage (V.sub.M) is produced by I.sub.1 and a combination 32 of R.sub.a, R.sub.b, and R.sub.c. A second bridge output voltage (V.sub.P) is produced by I.sub.2 and a combination 34 of R.sub.a, R.sub.b, and R.sub.c. A differential amplifier circuit (14) differentially amplifies the V.sub.M and V.sub.P voltages to produce differential voltages (V.sub.OM and V.sub.OP). Demodulators (DM1 and DM2) demodulate V.sub.OM and V.sub.OP to produce differential impedance voltages (V.sub.1M and V.sub.1P). A first comparator (OA3) changes states and produces a high logic output when V.sub.1M equals or exceeds a first threshold level (V.sub.TH1). A second comparator (OA4) changes states and produces a high logic output when V.sub.1P equals or exceeds a second threshold level (V.sub.TH2). An exclusive OR gate (G1) produces a high logic output (V.sub.OUT) when one and only one of OA3 or OA4 produce a high logic output.

Method and apparatus for differential lead impedance comparison

A differential lead impedance comparison apparatus (10) senses lead impedance and compensates for patient-to-patient and electrode variability. A bridge circuit (12) is connected to one end of electrode conductors (22, 24 and 26) in an ECG Leads I configuration. The other end of the conductors (22, 24 and 26) are connected to a patient (18) via electrodes (RA, LA and LL). Leads formed in part by RA, LA and LL and the respective conductors (22, 24 and 26) have lead impedances (R.sub.b, R.sub.a, and R.sub.c). Constant current sources (I1, I2 and I3) are connected to the conductors (22, 24, and 26) and supply constant AC currents (I.sub.1, I.sub.2 and I.sub.3). A first bridge output voltage (V.sub.M) is produced by I.sub.1 and a combination 32 of R.sub.a, R.sub.b, and R.sub.c. A second bridge output voltage (V.sub.P) is produced by I.sub.2 and a combination 34 of R.sub.a, R.sub.b, and R.sub.c. A differential amplifier circuit (14) differentially amplifies the V.sub.M and V.sub.P voltages to produce differential voltages (V.sub.OM and V.sub.OP). Demodulators (DM1 and DM2) demodulate V.sub.OM and V.sub.OP to produce differential impedance voltages (V.sub.1M and V.sub.1P). A first comparator (OA3) changes states and produces a high logic output when V.sub.1M equals or exceeds a first threshold level (V.sub.TH1). A second comparator (OA4) changes states and produces a high logic output when V.sub.1P equals or exceeds a second threshold level (V.sub.TH2). An exclusive OR gate (G1) produces a high logic output (V.sub.OUT) when one and only one of OA3 or OA4 produce a high logic output.

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Redmond, WA, United States of America

John R Stice