Network Computing Devices, Inc.

Koninklijke Philips Corporation N.v.

Tektronix, Inc.

Adelos, Inc.

John R Providenza

Stephen Timothy Doll

Peter Scott Lovely

James Alexander Philp

Lee Boekelheide

Bruce Ableidinger

Leon J Stevens

Timothy N Roberts

James Alexander Philip

Philip J Stimac

An embodiment of a system includes a light source, an optical assembly, and an electronic circuit. The light source (e.g., a laser) is configured to generate a source optical signal. The optical assembly is configured to direct the source optical signal into an end of an optical-fiber assembly that includes an optical fiber having a section wrapped multiple turns around a mandrel and including mandrel zones, and to receive, from the end of the optical-fiber assembly, a return optical signal. The electronic circuit is configured to select at least one mandrel zone in response to a component of the return optical signal from the at least one mandrel zone, and to detect an acoustic signal incident on the mandrel in response to the component of the return optical signal.

Optical mandrel, optical-fiber assembly including an optical mandrel, and system for detecting an acoustic signal incident on an optical-fiber assembly

An arbiter apparatus for selecting an agent to use a shared resource such as memory. A normal round robin list is utilized in the selection process during boot operation. During the initialization process, a dynamic list is generated in accordance with system requirements. The dynamic list selection process may take any of several forms. In a first mode, it may select only priority listed agents, any one of which may be repeated during a given cycle of selection. In a second mode, it may select a designated buddy agent when the selected priority agent is idle. In either mode, and in accordance with a set of priority selection rules, one or more lowest priority default agents may be given access when the designated higher priority agents for a given list entry slot are idle.

Shared resource arbitration method and apparatus

An electronic data storage memory performs logic operations on the data values existing in its storage cells to eliminate the number of necessary memory accesses during bitblts. The time in which a bitblt can be completed in an image processing system is prolonged because of the number of memory cycles performed during a 'raster operation'. Thus, to reduce the number of necessary memory cycles, simple logic operations are performed in image processor memory so that a raster operation may take place without having to read, for example, the destination operand from memory. Since a bitblt performs a raster operation on each pixel in the bitblt block, the reduction in memory access time is proportional to the size of the bitblt block.

Image processor memory for expediting memory operations

The number of required clock periods in a bit aligned block transfer operation may be reduced by analyzing the logical relationship between source, destination and pattern operands prior to fetching these operands from memory. If the result of the raster operation can be determined without actually using the value of any of the operands, the result is provided without reading memory values. When the raster operation will have no effect on the existing destination operand, the write operation is also canceled.

Bit aligned data block transfer method and apparatus

An apparatus for counting occurrences of a plurality of events characterized by unique event numbers includes a random access memory for storing event count numbers at addresses corresponding to the event numbers. The memory is addressed by an event number as the associated event occurs, and the event count number stored at such address is read and latched to an input of an adder. The adder increments the latched event count number and the incremented event count number is then written back into the memory at the current event number address. A buffer is provided to store the current event number whenever the adder overflows as a result of a count. Several such event numbers may be stored in the buffer for subsequent retrieval by an external controller thereby permitting the controller to determine when an event has been counted a fixed number of times and to increment its own internally stored count at a slower rate than the rate at which data is applied to the prescaler.

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Beaverton, OR, United States of America

John R Providenza