Viasat, Inc.

John R Owens

Richard L Quintana

Stuart N Shanken

John C Andolina

Sean K O'Keeffe

Albert J Bourdon

Gary G Christensen

Sean K O'KEEFFE

A cryptographic device and method are disclosed for processing different levels of classified information. Input and output ports are physically isolated on the cryptographic device. Within the cryptographic device, each port has its packets labeled in such a way that it can be processed differently from other packets by a cryptographic module. High-assurance techniques are used to assure labeling and proper processing of the packets. These labeled packets are intermixed on common pathways regardless of level of classification. Despite intermixing, separation of the packets is assured through the process.

Trusted labeler

A device for high-assurance processing is disclosed. A processing circuit uses an access controller to assure that the processing circuit operates properly. The processing circuit runs software programs and is programmable. The access controller is programmable, but not programmable by the processing circuit. Peripherals or segments of the address space of the processing circuit is regulated. In a particular state, the peripherals that are available are regulated by the access controller. In some embodiments, the transition from state-to-state can also be regulated by the access controller.

Input output access controller

A cryptographic processor for redundantly-processing cryptographic operations is disclosed. The cryptographic processor includes a number of input ports, a first and second cryptographic engines, comparison logic and a plurality of output ports. The number of input ports is configured to accept both plaintext and ciphertext. Each of the number of input ports is coupled to both the first and second cryptographic engines. The comparison logic is configured to determine if the first and second cryptographic engines produce a result that is different. The number of output ports is configured to produce both plaintext and ciphertext.

Trusted cryptographic processor

In one embodiment, a method for trusted booting of a cryptographic processor system is disclosed. Default image(s) is loaded into a field-programmable logic chip or circuit (FPLC). The default image(s) cannot perform cryptographic processing, but can perform a first algorithm that is unclassified. A processor, internal or external to the FPLC, can be used with the default image. A multi-layer or multi-part key has portions stored in two different places. A protected image is decrypted with the multi-layer key using the first algorithm and loaded into the FPLC. Cryptographic processing is performed using a second algorithm classified by the government.

Trusted boot

In one embodiment, a method for operating a field-programmable logic chip or circuit (FPLC) is disclosed. Operation of the FPLC includes a configuration state and a cryptographic processing state. Switching between states is controlled by a state machine. Each state has one or more images. Transferring between states causes some or all images from the other state being overwritten.

Overlapping state areas for programmable crypto processing circuits

A high-assurance system for processing information is disclosed. The high-assurance system comprising first and second processors, a task matching circuit, and first and second outputs. The task matching circuit configured to determine a software routine is ready for execution on the first processor, and delay the first processor until the second processor is ready to execute the software routine. The first output of the first processor configured to produce a first result with the software routine. The second output of the second processor configured to produce a second result with the software routine, where the first result is identical to the second result.

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Carlsbad, CA, United States of America

John R Owens