Omnivision Technologies, Inc.

Eastman-kodak Company

Semiconductor Components Industries, LLC

Truesense Imaging, Inc.

John Paul McCarten

Joseph R Summa

Cristian A Tivarus

Robert Michael Guidash

Todd J Anderson

Eric Gordon Stevens

Hung Q Doan

Christopher Parks

Eric J Meisenzahl

John Thomas Compton

Frederick T Brady

Gregory Oscar Moberg

John P Shepherd

Raymond J Bouvy

Robert Kaser

Image sensors may include image sensor pixels that support high dynamic range (HDR) global shutter function. An image sensor pixel may include a photodiode that is coupled to multiple storage gate nodes via respective charge transfer gates. Each of the multiple storage gate nodes may be configured to store charge corresponding to different exposure periods. The storage gate nodes may be coupled in parallel or in series with the photodiode. Charge from the different exposure times can then be merged to produce a high dynamic range image signal.

High dynamic range storage gate pixel circuitry

A method of clocking an image sensor which eliminates well bounce effects caused by global current flow in large image sensors during frame readout and line transfer is described. During charge transfer operations in which voltages are applied to VCCD gate contacts that are adjacent to the photodiodes, a compensating voltage may be applied to the lightshield that is associated with, and at least partially formed over the photodiode. Depending on polarity, the compensating lightshield pulse allows holes to locally flow from under the VCCD gates to the photodiode P+ pinning region or vice-versa, and in such a manner to eliminate the global flow of hole current. Lightshields may also be biased during electronic shuttering operations.

Methods for clocking an image sensor

An image sensor includes front-side and backside photodetectors of a first conductivity type disposed in a substrate layer of the first conductivity type. A front-side pinning layer of a second conductivity type is connected to a first contact. The first contact receives a predetermined potential. A backside pinning layer of the second conductivity type is connected to a second contact. The second contact receives an adjustable and programmable potential.

Image sensor with controllable vertically integrated photodetectors

In various embodiments, image sensors include strapping grids of vertical and horizontal strapping lines conducting phase-control signals to underlying gate conductors that control transfer of charge within the image sensor.

Metal-strapped CCD image sensors

Image sensor with controllable vertically integrated photodetectors using a buried layer

In various embodiments, image sensors include an imaging array of optically active pixels, a dark-reference region of optically inactive pixels, and two light shields disposed over the dark-reference region and having openings therein.

Dark reference in CCD image sensors

An electrical component includes a semiconductor layer having a first conductivity type and a interconnect layer disposed adjacent to a frontside of the semiconductor layer. At least one bond pad is disposed in the interconnect layer and formed adjacent to the frontside of the semiconductor layer. An opening formed from the backside of the semiconductor layer and through the semiconductor layer exposes at least a portion of the bond pad. A first region having a second conductivity type extends from the backside of the semiconductor layer to the frontside of the semiconductor layer and surrounds the opening. The first region can abut a perimeter of the opening or alternatively, a second region having the first conductivity type can be disposed between the first region and a perimeter of the opening.

Isolated wire bond in integrated electrical components

A back-illuminated image sensor includes a sensor layer disposed between an insulating layer and a circuit layer electrically connected to the sensor layer. An imaging area includes a plurality of photodetectors is formed in the sensor layer and a well that spans the imaging area. The well can be disposed between the backside of the sensor layer and the photodetectors, or the well can be a buried well formed adjacent to the backside of the sensor layer with a region including formed between the photodetectors and the buried well. One or more side wells can be formed laterally adjacent to each photodetector. The dopant in the well has a segregation coefficient that causes the dopant to accumulate on the sensor layer side of an interface between the sensor layer and the insulating layer.

Back-illuminated CMOS image sensors

An image sensor includes a first sensor layer having a first array of pixels and a second sensor layer having a second array of pixels. Each pixel of the first and second arrays has a photodetector for collecting charge in response to incident light, a charge-to-voltage conversion mechanism, and a transfer gate for selectively transferring charge from the photodetector to the charge-to-voltage mechanism. The first and second sensor layers each have a thicknesses to collect light with a first and second preselected ranges of wavelengths, respectively. A circuit layer is situated below the first sensor layer and has support circuitry for the pixels of the first and second sensor layers, and interlayer connectors are between the pixels of the first and second layers and the support circuitry.

Image sensor having multiple sensing layers

An image sensor includes an array of pixels comprising a plurality of kernels that repeat periodically and each kernel includes n photosensitive regions for collecting charge in response to light, n is equal to or greater than 2; and a transparent layer spanning the photosensitive regions having n optical paths, at least two of which are different, wherein each optical path directs light of a predetermined spectral band into specific photosensitive regions.

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Penfield, NY, United States of America

John Paul McCarten