North American Philips Corp, Signetics Division

John P Niemi

Wayne I Kinney

David Back

Jonathan E Macro

A method of forming isolation trenches in CMOS integrated circuits is disclosed. The trench side walls are covered by a thin oxide layer, and the trenches are filled with a highly doped polysilicon. The doped polysilicon has a high work function which prevents oxide charges from inverting the trench side walls and thereby turns off the parasitic transistors at these side walls to reduce latchup.

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Albuquerque, NM, United States of America

John P Niemi