Silego Technology Inc.

Union Carbide Corporation

Dialog Semiconductor (uk) Limited

John Othniel McDonald

Marcelo Martinez

Thomas D Brumett, Jr

Nathan Willis John

Crist Y Lu

Ilbok Lee

Jie Chen

Jay Li

Kenneth C Yi

Chen-Yu Wang

Horst Knoedgen

Ambreesh Bhattad

Albert Chen

Isaac Moked

Jannan G Lee

Zach Zimits

Daniel Smallwood

David Kun-Teh Chow

Tan H Eang

An apparatus and method for plating magnetic cores by periodically transferring a plate directly back and forth between a metal plating environment and an insulation deposit environment. This direct metal to insulation to metal plating is enabled by a nano-scale insulation layer that provides an imperfect coverage of the metal layer while still keeping sufficient insulation to prevent eddy current formation—even during high-frequency current applications. Therefore, this invention enables the practical creation of magnetic cores having layers with widths even under one nanometer and can generate cores having a layer scale that can be varied to suit a variety of uses in the microelectronic industry.

Method and apparatus for plating metal and metal oxide layer cores

The present invention is a spark gap protection capable of integrating into multiple layer semiconductor substrate packaging. The initial gap in the spark gap is solid and it can be converted into air, meaning gaseous, and the air gap is achieved by having the gap initially be filled with a solid and then running a voltage through the spark gap so that the gap explodes and the solid is replaced by an air cavity.

Method and apparatus for integrating spark gap into semiconductor packaging

A method of authenticating a second electronic device at a first electronic device, the method comprising: providing at the second electronic device a memory, the memory comprising a first memory portion which has restricted access and is readable only when a first secret key is presented to the second electronic device; sending the first secret key from the first electronic device to the second electronic device; in response, sending a second secret key stored in the first memory portion from the second electronic device to the first electronic device; and authenticating the second secret key at the first electronic device.

Method of authenticating a device

A switching circuit and a method for providing a switch array having an on resistance is presented. The switch array has a plurality of switches, where each switch is arranged to be in different configuration states. The states include an enabled configuration and a disabled configuration. The switching states include an on state and an off state. Each switch is held in the off state when in the disabled configuration. Control circuitry sets the switches to either the enabled configuration or the disabled configuration, and a memory element coupled to the control circuitry and arranged to store configuration data for setting the configuration state of each of the switches. The control circuitry sets the configuration state of the switches based on a signal received from the memory element. The on resistance of the switch array depends on the switching state of the switches and their individual on resistances.

Switching circuit

A security integrated circuit is disclosed. In some embodiments, the security integrated circuit comprises metal configured memory that stores a first portion of each of a plurality of keys, programmable memory that stores a second portion of each of the plurality of keys, and an interface for connecting to an external authentication system. The metal configured memory and programmable memory store a prescribed finite number of host keys and matching device keys. In response to a received host key from the external authentication system, a matching device key is provided by the security integrated circuit.

Security integrated circuit

A low cost, high efficiency light-emitting diode design is disclosed. In some embodiments, a p-n junction of a light-emitting diode is formed in an epitaxial layer grown on a substrate. Grinding the backside of an associated wafer after encapsulation not only opens a light path for the light emitting diode but removes most residual defects.

Method of manufacturing low cost, high efficiency LED

A single integrated circuit that supports both power switching and data switching is disclosed. In some embodiments, the integrated circuit comprises a driver circuit configured to drive a switch of an associated line in a power mode or in a data mode and one or more decoupling capacitor ground switches, wherein each decoupling capacitor ground switch connects an associated decoupling capacitor to ground in the power mode and wherein each decoupling capacitor ground switch leaves an associated decoupling capacitor floating in the data mode.

Power and data switch

An integrated circuit frequency generator is disclosed. In some embodiments, the frequency generator comprises an electronic oscillator configured to generate an oscillator frequency and calibration circuitry configured to periodically calibrate the electronic oscillator with respect to a reference frequency source. When a primary power source is unavailable, an output frequency is generated from the oscillator frequency, and the reference frequency source is powered-on only during calibration cycles.

Integrated circuit frequency generator

An integrated circuit for switching a transistor is disclosed. In some embodiments, an operational amplifier is configured to drive a transistor, and slew rate control circuitry is configured to control the slew rate of the transistor source voltage during turn on. The transistor source voltage is employed as feedback to the operational amplifier to facilitate closed loop control of the transistor source voltage during switching of the transistor.

Gate control circuit

Various techniques for dynamic power FET switching are disclosed. In some embodiments, a device comprises an array of two or more independently switchable power MOSFETs that are configured to sense current in a high current mode and a low current mode as well as circuitry for automatically switching from the low current mode to the high current mode when sensed current is above a threshold to switch to the high current mode.

Dynamic power FET switching

A four pin integrated circuit MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) load switch is disclosed that provides full features including adjustable ramp time/rate, adjustable discharge time/rate, temperature control, over-current control, and short circuit protection. In some embodiments, the adjustable ramp is based on the voltage or current input into the integrated circuit.

Growing community of inventors

Mountain House, CA, United States of America

John Othniel McDonald