Marconi Instruments Limited

Ifr Limited

John Norman Wells

David P Owen

Neil E Thomas

John Michael Reeve

A modulator is based around a switching circuit and a pausey stub balun . The balun has a distributed resistance to ground. The balun may be implemented as a strip line device (FIG. ).

Signal combiner

A frequency synthesizer for producing a tunable frequency output signal. The synthesizer includes a tunable frequency oscillator having a tunable output signal and including: a voltage controlled oscillator (VCO) for generating an output signal; a harmonic generator coupled to the VCO for generating a plurality of harmonics of the VCO output signal; and a tunable bandpass filter coupled to the harmonic generator and having an output for selectively passing any one of the VCO output signal harmonics which constitutes both the tunable output signal of the tunable frequency oscillator and the tunable frequency output signal of the frequency synthesizer. The synthesizer further includes a variable device coupled to the tunable bandpass filter for reducing a frequency of the tunable output signal of the tunable frequency oscillator for generating a reduced frequency output signal; and a phase detector coupled to the variable device for producing an error signal in dependence of a comparison between the reduced frequency output signal and a predetermined reference signal, the phase detector further being coupled to the VCO of the tunable frequency oscillator for creating a phase locked loop for controlling the VCO output signal based on the error signal.

Frequency synthesizer

A variable frequency signal generator includes a phase locked loop having a variable frequency oscillator which has a control port to which a frequency determining signal is applied, the output of the oscillator being fed via a frequency divider to a phase sensitive detector where it is compared with a reference frequency signal, the result of said comparison being arranged to generate a comparison signal which is fed to a loop filter which is coupled to said control port; and the signal generator having a frequency control signal applied thereto and comprising a first path being arranged to adjust the division ratio of the frequency divider, and a second path including a combiner for combining said frequency control signal and said comparison signal to produce said frequency determining signal; and a calibrator for adjusting the relative characteristics of said first and second paths to compensate for effects arising from tuning sensitivity dependence on frequency of said variable frequency generator.

Variable frequency signal generator

A low-noise frequency synthesizer comprises a low-noise oscillator, such as a crystal oscillator, a multiplier, a divider and a phase-locked loop and is adapted to provide an output signal which is a combination of the multiplied and divided frequency. Thus, a large number of frequencies are available as an output in small increments determined by the division ratio of the divider.

A phase comparator accepts two streams of digital pulses, one being a reference signal and the other a test signal, and generates an output signal indicative of the phase difference. The phase comparator can be implemented as a four-state device or higher, and thus exhibits a wide phase capture range, i.e. multiples of 360.degree., and can provide a stable, predictable and linear output signal when the two input signals are in lock. It is therefore very suitable for use in a phase locked loop in which temporary wide variations in phase can occur.

Phase comparators

A frequency synthesizer produces a variable frequency output using a controllable oscillator and a variable frequency divider which form part of a phase locked loop. The integer division ratio of the divider can be altered during a division cycle to simulate a fractional divisor value. The phase noise or jitter which is caused by the step change in divisor value is removed by altering the divisor value in accordance with the terms of a plurality of sequences, each of which sums to zero and which represents successive rows in a Pascal's triangle. A cascaded sequence of accumulators is used to determine the starting instants of each sequence, and the length of each sequence is dependent on the number of delay lines used. Although only four accumulators are illustrated, more can be added to give any desired degree of phase noise cancellation.

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St. Albans, United Kingdom

John Norman Wells