Globalfoundries Inc.

Advanced Micro Devices Corporation

John Morgan

Roman Boschke

Andreas Kurz

Christoph Schwan

Alban Zaka

El Mehdi Bazizi

Tom Herrmann

Ignasi Cortes Mayol

The present disclosure provides resistor structures in sophisticated integrated circuits on the basis of an SOI architecture, wherein a very thin semiconductor layer, typically used for forming fully depleted SOI transistors, may be used as a resistor body. In this manner, significantly higher sheet resistance values may be achieved, thereby providing the potential for implementing high ohmic resistors into sophisticated integrated circuits.

Resistor structure with high resistance based on very thin semiconductor layer

A semiconductor structure includes a semiconductor substrate, a plurality of transistors and an electrically insulating layer provided between the substrate and the plurality of transistors, and a trench isolation structure including a portion between a first and a second island of the semiconductor structure and extending into the substrate to a first depth. The substrate includes a bottom region having a first type of doping and extending at least to a second depth greater than the first depth, and a deep well region having a second type of doping and extending to a third depth greater than the first depth and smaller than the second depth. Each of the first and second islands includes a first backgate region having the first type of doping and being continuous with the bottom region and a second backgate region having the second type of doping and being continuous with the deep well region.

Semiconductor structure including backgate regions and method for the formation thereof

In SOI devices, the PN junction of circuit elements, such as substrate diodes, is formed in the substrate material on the basis of the buried insulating material that provides increased etch resistivity during wet chemical cleaning and etch processes. Consequently, undue exposure of the PN junction formed in the vicinity of the sidewalls of the buried insulating material may be avoided, which may cause reliability concerns in conventional SOI devices comprising a silicon dioxide material as the buried insulating layer.

SOI device with a buried insulating material having increased etch resistivity

In integrated circuits, resistors may be formed on the basis of a silicon/germanium material, thereby providing a reduced specific resistance which may allow reduced dimensions of the resistor elements. Furthermore, a reduced dopant concentration may be used which may allow an increased process window for adjusting resistance values while also reducing overall cycle times.

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Dresden, Germany

John Morgan