Brocade Communications Systems, Inc.

Brocade Communication Systems LLC

Brocade Communications, Inc.

Avago Technologies International Sales Pte. Limited

John Michael Terry

Wing Cheung

Shunjia Yu

Kung-Ling Ko

Joseph Juh-En Cheng

Phanidhar Koganti

Surya Parkash Varanasi

Surya Prakash Varanasi

Suresh Vobbilisetty

Anoop Ghanwani

Jan Bialkowski

Venkata Pramod Balakavi

Parviz Ghalambor

Jian S Liu

Abhay K Gupta

Mythilikanth Raman

Rajiv Krishnamurthy

Dilip Chatwani

Satsheel Altekar

Philip Lynn Leichty

Ronald K Kreuzenstein

Mahesh Srinivasa Maddury

How Tung Lim

Kreg A Martin

Nagarajan Venkatesan

Vankata Pramod Balakavi

Ram Kirshnan

Vipin Agrawal

Kung Ling Ko

Narasimha Golla

Systems and techniques for processing and/or forwarding packets are described. An ingress switch can use a QoS mapping mechanism to map a first set of Quality of Service (QoS) bits in a packet received from a customer to a second set of QoS bits for use in a Transparent Interconnection of Lots of Links (TRILL) packet which encapsulates the packet. The first set of QoS bits can be different from the second set of QoS bits. The TRILL packet can be processed and/or forwarded in the network based on the second set of QoS bits. At the egress switch, the TRILL packet can be decapsulated and the original packet with the original QoS bits (or QoS bits that are different from the original QoS bits) can be forwarded to the customer's network. In this manner, some embodiments of the present invention can preserve the QoS bits across a TRILL network.

Preserving quality of service across trill networks

Packets or data units and their related credit returns each include an assigned phase value. When a credit test is desired, the phase value of outgoing data units is changed, for example from 0 to 1, and a new counter is set to a value of the outstanding credits having the original phase value. With each original phase credit received, the counter value is decremented. When a credit having the new phase value is received, the counter value indicates the amount of any credit error and appropriate corrections may be made.

End-to-end credit recovery

Use of a hash operation based on selected information in the packet to select one of a set of enable vectors. The selected enable vector is then effectively ANDed with the link expansion vector to select the actual links to be used. The enable vectors vary by selecting a different link in the LAG port for each enable vector. Thus the hash is used to vary the link of the LAG port used to transmit the packet for that multicast packet.

Multicast spray over LAG

A switch that facilitates remote port mirroring is described. The switch can include an encapsulation mechanism and a forwarding mechanism. The encapsulation mechanism can be configured to encapsulate a copy of a first packet in a second packet, thereby preserving header information (e.g., a VLAN identifier and/or a TRILL header) of the first packet. The forwarding mechanism can be configured to forward the first packet using header information of the first packet, and forward the second packet using header information of the second packet. The second packet can be received at a destination switch which extracts the first packet from the second packet, and sends the first packet on a port which is coupled to a network analyzer.

Remote port mirroring

A mechanism for identifying long-lived large flows in a communication network is disclosed in which packets transmitted through ports of a switching device or router are continuously examined. As new flows are recognized, their flow definition information is processed through a hashing table that uses a predetermined number of hash stages each having a pre-selected number of hash buckets. Each hash bucket has a counter that is incremented each time flow definition information ends up in the bucket. At the same time as counters are incremented, they are compared against a threshold number. If the bucket counters for all the hash stages exceed this threshold number, the flow is identified as a long-lived large flow and stored as such in a flow table.

Algorithm for long-lived large flow identification

A network device provides priority map storage configured to store one or more mapping data structures for mapping multiple priorities of a first priority scheme to multiple priorities of a second priority scheme. In addition, mapping logic of the network devices is coupled to the priority map storage and configured to translate a first priority of a first frame of the first priority scheme to a second priority of the second priority scheme and to assign the second priority to a second frame carrying payload of the first frame in preparation of transmission of the second frame in accordance with the second priority scheme.

Quality of service in a heterogeneous network

A switch creates and dynamically updates a latency map of a network to adjust routing of flows. Further, the network is monitored to detect latency issues and trigger a dynamic adjustment of routing based on the latency map. In this manner, a flow can be routed along a route (i.e., a faster route) that provides less latency than other available routes. The latency map can be generated based on latency probe packets that are issued from and returned to the source switch. By evaluating many such latent probe packets that have traveled along many available routes (e.g., corresponding to various ports of the switch), the switch or associated administrative logic can dynamically adjust the latency map to updated latency information of available routes. Therefore, responsive to a trigger, the source switch can dynamically adjust the routing of a flow based on latency issues discerned from the network.

Dynamic latency-based rerouting

One embodiment of the present invention provides a switch. The switch includes a forwarding mechanism and a control mechanism. During operation, the forwarding mechanism forwards frames based on their Ethernet headers. The control mechanism operates the switch in conjunction with a separate physical switch as a single logical switch and assigns a virtual switch identifier to the logical switch, wherein the virtual switch identifier is associated with a link aggregation group.

Method and system for link aggregation across multiple switches

A LPM search engine includes a plurality of exact match (EXM) engines and a moderately sized TCAM. Each EXM engine uses a prefix bitmap scheme that allows the EXM engine to cover multiple consecutive prefix lengths. Thus, instead of covering one prefix length L per EXM engine, the prefix bitmap scheme enables each EXM engine to cover entries having prefix lengths of L, L+1, L+2 and L+3, for example. As a result, fewer EXM engines are potentially underutilized, which effectively reduces quantization loss. Each EXM engine provides a search result with a determined fixed latency when using the prefix bitmap scheme. The results of multiple EXM engines and the moderately sized TCAM are combined to provide a single search result, representative of the longest prefix match. In one embodiment, the LPM search engine supports 32-bit IPv4 (or 128-bit IPv6) search keys, each having associated 15-bit level 3 VPN identification values.

Longest prefix match scheme

A solution for network packet latency measurement includes, at a network device having a memory, storing a first time value indicating when an ingress port of the network device received a packet. The solution also includes storing a second time value indicating when an egress port of the network device received the packet for transmission towards another network device. The solution also includes storing a difference between the first time value and the second time value.

Network packet latency measurement

One embodiment of the present invention provides a system that facilitates transmission buffer under-run protection. During operation, the system stores bits of a data frame in a transmission buffer associated with an output port. The system also monitors the state of the transmission buffer and commences transmission of the data frame to the output port prior to complete reception of the data frame in the transmission buffer. The system further determines that the amount of data stored in the transmission buffer is below a predetermined threshold and inserts a number of predetermined unique bit sequences after the partially transmitted data frame, thereby allowing a receiving device to temporarily suspend reception of the data frame and resume reception at a later time without dropping the data frame.

Transmission buffer under-run protection

One embodiment of the present invention provides a system that facilitates flow control of multi-path-switched data frames. During operation the system transmits from an ingress edge device data frames destined to an egress edge device across different switched paths based on queue status of a core switching device and queue status of the egress edge device. The egress edge device is separate from the core switching device.

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San Jose, CA, United States of America

John Michael Terry