Honeywell Information Systems Inc.

John M Woods

Earnest M Monahan

Marion G Porter

Jaime Calle

Garvin Wesley Patterson

Jerome J Twibell

Bruce C Keene

Edward F Weller, Iii

Robert J Garvey

George L Parris

Donald V Mills

An input/output system includes at least a pair of processing units and system interface apparatus for comparing the results produced by both halves of the pair during normal system operation under control of a main or host processing unit. The system interface apparatus includes comparison circuits for detecting a mis-compare between the results of each half and sequence control logic circuits which are conditioned upon the occurrence of a mis-compare to unlock or deconfigure the pair to establish in a predetermined manner which of the processing units is faulty. The system interface apparatus, following signal indications of a certain minimum confidence within a processing unit, continues testing of the processor using stored diagnostic routines to determine which one of the processing units is good. It then stops the operation of the bad processing unit and enables system operation to be continued with the good processing unit. To ensure reliable processing, both halves of the pair are tested when a miscompare cannot be related to an error condition associated with one of the pair notwithstanding the fact that the first processing unit tests well. Following reconfiguration, the operating system associated with the system provides periodic testing of the good processing unit, thereby ensuring that the system continues to operate reliably.

Input/output processing system utilizing locked processors

An input/output processing system comprises a number of modules including at least a pair of processing units connected to operate as a logical pair and a system interface unit having a number of ports. Each port connects to a different one of the modules for interconnecting pairs of modules for communication over a number of switching circuit networks included in the system interface unit. The system interface unit further includes control logic circuits for disconnecting each processor of the logical pair preventing the disconnected processing unit from communicating with other modules. The control logic circuits further include circuits which in response to special commands from a good processor are operative to condition via a special line, circuits in the disconnected processing unit to apply status signals representative of the contents of a control register to the system interface unit. The other circuits within the system interface unit in response to a further command condition certain switching circuit networks for loading the status signals into one of the registers included in the system interface unit for subsequent analysis by system routines.

Input/output maintenance access apparatus

A data processing system includes as part of its power circuits, a number of converter circuits, each coupled to a different one of the power supply units which are to provide different voltages for distribution and use throughout the system. Each of the power supply circuits furnish a 24 volt dc power confidence signal to a central ac power input entry panel which applies the power confidence signals to the converter circuits. Each converter circuit includes an optically coupled isolator circuit which converts the 24 volt dc signal to a noise free low voltage logic level suitable for utilization by the low level high speed logic circuits included within the system. The output noise free low voltages provided by the converter circuits are in turn applied to a corresponding number of confidence input lines of a system interface unit which includes a plurality of ports, each port connected to a different module within the data processing system. The states of the low voltage logical level signals are stored in a status register. When the operating system determines that a unit is inoperative due to a power supply unit failure, it can logically disconnect the port having a module having the failure. Additionally, one of the converter circuits provides a second output signal which is used to enable the clock circuits during system power up only after the system has been placed in a known state.

Power confidence system

An automatic reconfiguration hardware capability for automatically altering the local memory/processor configuration and reinitiating a bootload sequence in the event of a failure in the start-up phase of the input/output processor bootload. The automatic reconfiguration logic is enabled when a bootload request originates from the system console or the central system. Once a bootload request is initiated, all possible local memory/input-output processor (IOPP) configurations are attempted without further manual intervention. If no configuration is successful, a bootload error indication is presented at the I0P configuration panel.

Automatic reconfiguration apparatus for input/output processor

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Glendale, AZ, United States of America

John M Woods