Motorola Corporation

John M Golio

Joseph Staudinger

Warren L Seely

David J Halchin

Michael Dydyk

Robert J Higgins

Aristotelis S Arvanitis

William B Beckwith

Lawrence S Klingbeil, Jr

James G Gilbert

Monte G Miller

Earnest J Johnson

George B Norris

Robert C Turner

Fred H Bonn

Janet R Golio

David A Warren

Ronald J Massey

Jean B Verdier

A field effect transistor structure which can serve as a low noise amplifier. The field effect transistor has a major surface and source and drain regions extending from the major surface into a body of semiconductor material. A channel region is formed in a portion of the body of semiconductor material separating the source and drain regions. The channel region has a first boundary perpendicular to the major and contiguous with the source region, a second boundary parallel to the first boundary and contiguous with the drain region, a third boundary perpendicular to the first boundary, and a fourth boundary parallel to the channel region. A first portion of the channel region is enclosed by a first border parallel to the first boundary of the channel region, a second border parallel to the second boundary of the channel region, a third boundary of the channel region, and the fourth boundary of the channel region. A non-conductive section is formed in the body of semiconductor material extending from the major surface and enclosed by a first edge coinciding with the first border of the first portion of the channel region, a second edged coinciding with the second border of the first portion of the channel region, a third edge parallel to the third boundary of the channel region, and a fourth edge parallel to the fourth boundary of the channel region. A gate structure is formed above the first portion of the channel region.

Field effect transistor

A field effect transistor (10) has an active layer (16) formed in a substrate (12). A gate (20) is disposed on an elevated platform (18) formed from the active layer (16). The elevated platform (18) raises the bottom surface (21) of the gate (20) relative to the top surface (34, 36) of the active region (13) on either side of the gate (20). A fabrication method for the transistor (10) forms the elevated platform (18) by etching the active region surface (44) on both sides of the gate (20) so that the bottom surface (21) of the gate (20) is elevated relative to the top surface (34) of the surrounding active region (13). The gate (20) itself and/or a patterned photoresist layer (116) may be used as a mask for performing this etch.

Method for fabricating an elevated-gate field effect transistor

A semiconductor substrate with electronic circuitry (e.g., a transmitter or receiver) formed thereon and including interconnects. A ferrite disk bonded to the substrate so as to interact with the interconnects, when the ferrite disk is activated by a substantially constant magnetic field thereacross, to provide frequency selectivity within the electronic circuitry. A permanent magnet positioned adjacent to the ferrite disk to provide a substantially constant magnetic field across the ferrite disk so that the magnetic field produces resonance in the ferrite disk.

Method of making a ferrite/semiconductor resonator/filter

A method executed by a computer for performing numerical optimization of arbitrary functions in a computer model using parallel processors (10, 12, 14). The method initializes (20) each processor with an initial estimate of the parameter value to be optimized. The initial estimate is evaluated (22) in each processor to determine a solution. A best estimate of the parameter value from the result in each processor is selected (24), and one or more of the parallel processors with the best estimate is set to run in gradient mode while the remaining processors run in random mode (26). The estimates of the parameter value from the processors running in random mode is evaluated until a local minimum is obtained from the processor running in gradient mode (28). The process is repeated until an optimal solution is found (34).

Optimization method using parallel processors

Elevated-gate field effect transistor structure and fabrication method

A method and apparatus for a probeable substrate substitute for a calibration standard and test fixture. The probestrate includes a dielectric substrate having first and second dielectric substrate surfaces and at least one conductive via hole through the dielectric substrate from the first dielectric substrate surface to the second dielectric substrate surface. A first metalized layer is in contact with the first dielectric substrate surface and the at least one conductive via hole. A second metalized layer is in contact with a first portion of the second dielectric substrate surface and with the at least one conductive via hole. The first and second test ports contact a second portion of the second dielectric substrate surface. An electronic device can be connected to the first and second test ports with bond wires for characterization via contact of the first and second test ports with standard test station equipment.

Probeable substrate substitute for a calibration standard and test

Ferrite-semiconductor resonator and filter

A mixer separates IF components IF1, IF2 of the same frequency which are images of different frequency RF signals RF1, RF2 beating with a given LO signal. The LO signal is applied to a FET active power divider and applied to the drains of a pair of balanced FET mixing elements. The FETs for the active power divider are built from the same device structure as the FETs for the mixing elements sharing drain nodes. The RF signals are passed through a quadrature phase shifter and applied to the gates of the FET mixing elements. The mixed signals appear at the drains of FET mixing elements are applied to opposing ports of a second quadrature hybrid at whose output ports the separated IF output signals IF1, IF2 appear.

Active image separation mixer

An attenuator circuit uses single point control to adjust the attenuation levels between first and second nodes. The attenuator is set-up as a .pi.-network with a pass transistor and first and second shunt transistors. Capacitors are coupled in the drain and source conduction paths of the first and second shunt transistors for DC isolation to float the shunt transistors. A control voltage applied at the drain of the pass transistor and the gates of the first and second shunt transistors controls the attenuation level. A parallel resistor and capacitor combination at the drain of the first shunt transistor provides tuning to match the input impedance of the attenuator to the sourcing circuit.

Attenuator circuit operating with single point control

An apparatus for mixing electrical signals including in combination: first signal splitting means having a radio frequency (RF) port and first, second, third and fourth signal ports, second signal splitting means having a local oscillator (LO) port and first, second, third and fourth signal ports, intermediate frequency (IF) port, and mixer element means, the mixer element means coupled to the first, second, third, and fourth signal ports of the first and second signal splitting means and coupled to the intermediate frequency port means, for mixing two of the RF, IF, and LO signals to produce the remaining signal.

Intermediate frequency independent star mixer

A variable field effect capacitive device suitable for providing different amounts of capacitance in response to control signals of different magnitudes. The device includes a pair of plate electrodes and a pair of control electrodes. A semiconductor region is located between the control electrodes. The plates each make Schottky contact to the semiconductor region to form a depletion region therein which changes shape in response to changes in the magnitude of the control signals.

Tunable capacitor with RF-DC isolation

Optical signal frequency conversion and mixing is accomplished by an optical device comprised of a photodetector, a non-linear device, passive circuitry, and a multiple quantum well structure. The photodetector converts a light signal into an electrical signal. The non-linear devices create harmonics of the electrical signal of which the passive circuitry selects a desired frequency of the harmonics. This selected frequency in turn modulates the multiple quantum well structure. A power bias is applied to the multiple quantum well structure which is then modulated by it to produce a modulated output light beam modulated at the selected frequency.

Optical signal frequency converter and mixer

A field effect device and circuit suitable for providing an analog output signal having a magnitude which is representative of a digital input code having a sequence of bits. The device includes a plurality of gate electrodes located between an input electrode and an output electrode. The gate electrodes have unequal lengths to provide different gate widths each representative of the magnitude of a portion of an analog signal provided at the output electrode in response to a digital signal of a particular logic state, such as a logical 'one', when applied to any one of the gate electrodes. Thus, the magnitude of the current conducted between the input electrode and the output electrode is responsive to the sum of the widths of the gates receiving the digital signal of a particular logic state.

Digital-to-analog converting field effect device and circuitry

A variable field effect attenuator suitable for providing digitally controlled attenuation characteristic is disclosed. The attenuator can include a first semiconductor region connected in a series path between the input and output terminals and at least one shunt semiconductor region connected between the series path and a reference potential conductor. First gate electrodes are arranged to operate with the series semiconductor region and second gate electrodes are arranged to operate with the shunt semiconductor region. Gate electrode control lines are connected to selected gate electrodes so that digital signals can be selectively applied to the gate electrodes to render the semiconductor material associated therewith either conductive or nonconductive to provide a plurality of predetermined amounts of attenuation between the input and output terminals in response to a digital code.

Digitally controlled field effect attenuator devices

Overlapping gate electrodes are selectively energized to vary the electrical length and thus the resistance of the conductive path through a field effect attenuator. The electrical width can also be varied to provide additional control over the resistance.

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Chandler, AZ, United States of America

John M Golio