Micron Technology Incorporated

John K Skrovan

Scott G Meikle

Karl M Robinson

Guy F Hudson

David Q Wright

Allen McTeer

Michael A Walker

Theodore M Taylor

Won-Joo Kim

A buried transistor particularly suitable for SOI technology, where the transistor is fabricated within a trench in a substrate and the resulting transistor incorporates completely isolated active areas. The resulting substrate has a decreased topography and there is no need for polysilicon (or other) plugs to connect to the transistor, unless desired. With this invention, better control is achieved in processing, particularly of gate length. The substrate having the buried transistor can be silicon oxide bonded to another substrate to form an SOI structure.

Buried transistors for silicon on insulator technology

Conditioning systems and methods for conditioning polishing pads used in mechanical and chemical-mechanical planarization of microelectronic-device substrate assemblies. In one aspect of the invention, a conditioning system includes a conditioning element or conditioning member having a conditioning face configured to engage a polishing pad. The conditioning face preferably includes a bonding medium covering at least a portion of the conditioning face and a plurality of conditioning particles attached to the bonding medium. The conditioning system also includes a corrosion-inhibiting unit that can be coupled to the conditioning element or a liquid on the polishing pad. The corrosion-inhibiting unit retards corrosion of the bonding medium in the presence of chemicals on the polishing pad that would otherwise corrode the bonding medium. For example, the corrosion-inhibiting unit can be a DC power source coupled to the conditioning element and the polishing pad to impart an electrical potential between the conditioning element and the polishing pad that retards corrosion of the bonding medium and/or other components of the conditioning element.

Apparatus and methods for conditioning polishing pads in mechanical and/or chemical-mechanical planarization of microelectronic-device substrate assemblies

A planarization method including the provision of a wafer having a wafer surface. A pad is positioned for contact with the wafer surface and the wafer surface is planarized using the pad and a fluid composition that includes a chelating agent. The chelating agent is a water soluble multidentate chelating agent, preferably a water soluble bidentate ionic chelating agent, and more preferably 1,2-ethylenediphosphonic acid (EDP). A fluid composition for use in planarization of a surface of a wafer includes a chemically interactive component that interacts with the surface of the wafer and a chelating agent for reducing the metal ion contamination of the wafer during planarization. The chelating agent may be one of a water soluble multidentate chelating agent, preferably a water soluble bidentate ionic chelating agent, and more preferably 1,2-ethylenediphosphonic acid (EDP). Further, the fluid composition may include an abrasive component.

Planarization method using fluid composition including chelating agents

A series of process steps is described for the planarization of a semiconductor substrate, such as a semiconductor wafer, using a linear track polisher, a rotational polisher, or the combination of both. The process steps include a first processing step at a first polishing pressure and a first continuous polishing surface speed which enables a relatively high rate of material removal from the surface of the semiconductor substrate, and a second processing step at a second polishing pressure and a second continuous polishing surface speed which removes any surface scratches, abrasions, or other defects which may have been induced during the first processing step. The same continuous polishing surface can be used in both the first and second processing steps. An alternative third processing step is described wherein an abrasive chemical slurry, used in the first and second processing steps to facilitate material removal, is converted to a non-abrasive, pH controlled cleaning solution to facilitate substrate pre-cleaning and to prevent build-up of particles on a polishing surface of the linear track or rotational polisher.

Planarization process

Apparatus and methods for conditioning polishing pads in mechanical and/or chemical-mechanical planarization of microelectronic device substrate assemblies

An abrasive polishing pad for planarizing a substrate. In one embodiment, the abrasive polishing pad has a planarizing surface with a first planarizing region and a second planarizing region. The first planarizing region has a first abrasiveness and the second planarizing region has a second abrasiveness different than the first abrasiveness of the first region. The polishing pad preferably has a plurality of abrasive elements at the planarizing surface in at least one of the first or second planarizing regions. The abrasive elements may be abrasive particles fixedly suspended in a suspension medium, contact/non-contact regions on the pad, or other elements that mechanically remove material from the wafer. In operation of a preferred embodiment, the lesser abrasive of the first and second planarizing regions contacts a first area of the wafer where the relative velocity between the wafer and the polishing pad is relatively high, and the more abrasive of the first and second planarizing regions contacts a second area of the wafer where the relative velocity between the wafer and the polishing pad is relatively low. The different abrasivenesses of the first and second planarizing regions compensate for variations in relative velocities across the face of the wafer to more uniformly planarize the wafer.

Variable abrasive polishing pad for mechanical and chemical-mechanical planarization

In one aspect, the invention includes a semiconductor processing method of reducing corrosion of a material, comprising exposing the material to a liquid solution comprising at least about 5% (by atomic percent) of an oxygen-comprising oxidant to form an oxide layer over the material. In another aspect, the invention includes a semiconductor processing method of forming an aluminum-comprising line within a layer of material, comprising: a) forming a layer of material over a semiconductive substrate; b) forming trenches within the layer of material; c) forming an aluminum-comprising layer within the trenches and over the layer of material; d) planarizing the aluminum-comprising layer to form aluminum-comprising lines within the material, the planarizing comprising abrading a portion of the aluminum-comprising layer with a first fluid, the first fluid comprising a slurry; and e) displacing the slurry with a second fluid comprising at least about 5% (by atomic percent) of ozone.

Methods of reducing corrosion of materials, methods of protecting aluminum within aluminum-comprising layers from electrochemical degradation during semiconductor processing, and semicoductor processing methods of forming aluminum-comprising lines

Planarization fluid composition including chelating agents

The present invention is directed to polishing pads useful in determining an end to the useful wear life thereof. In a simple embodiment of the present invention, a polishing pad that is used with slurries is dyed on one side in a manner that causes the dye to permeate the pad to a limited depth that does not cause total coloring. Another embodiment of the present invention involves a fixed abrasive pad that has fixed abrasives embedded into the pad to a selected depth where at least one color level is within the portion of the pad that contains the fixed abrasives. After dyeing the pad, the pad is attached to the polishing platen. During the polishing operation, a color change signals a time to stop the polishing operation and change the pad. With multiple colors in the pad, limited only by the ability to dye the pad with uniform depth levels, characteristic wear patterns can be observed and adjustments made accordingly to prolong and optimize pad life. A pad having voids and optional abrasives incorporated therein is also disclosed. The contents of each void facilitates the detection of the degree to which the polishing pad has been worn during a polishing operation. Substances may be stored within voids that are released by the breach of the voids caused abrasion during the polishing operation. Visual or audible diagnostics resulting from the breaching of voids are useful to control the polishing operation and thus increase yield.

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Granger, TX, United States of America

John K Skrovan