Lsi Corporation

Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies International Sales Pte. Limited

Broadcom International Pte. Ltd.

John Jansen

Shaohua Yang

Mohammad Shafiul Mobin

Haitao Xia

Shahriar Moinian

Chi-Yi Kao

Ce Chen

A semiconductor device, memory system, and method are provided. One example of the semiconductor device is disclosed to include a host interface that enables bi-directional communications with a host computer, a processor subsystem that enables processing of read or write requests received at the host interface, and one or more storage media interfaces, each of the one or more storage media interfaces being convertible between a first configuration and a second configuration, where the first configuration of a storage media interface enables a direct connection with a computer memory device, and where the second configuration of the storage media interface enables a connection with a plurality of computer memory devices via an expander and/or re-timer.

System and method for providing a configurable storage media interface

Embodiments are related to systems and methods for data transfer, and more particularly to systems and methods for providing transfer margin information.

Systems and methods for accurate transfer margin communication

Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for clock recovery in a data receiver.

Systems and methods for SerDes physical layer qualification and mitigation

An electronic device includes an active layer located over a substrate with the active layer having a logic circuit and an eDRAM cell. The electronic device also includes a first metallization level located over the active layer that provides logic interconnects and metal capacitor plates. The logic interconnects are connected to the logic circuit and the metal capacitor plates are connected to the eDRAM cell. The electronic device additionally includes a second metallization level located over the first metallization level that provides an interconnect connected to at least one of the logic interconnects, and a bit line that is connected to the eDRAM cell. A method of manufacturing an electronic device is also included.

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Macungie, PA, United States of America

John Jansen