Semiconductor Components Industries, LLC

Flir Systems, Incorporated

Ami Semiconductor, Inc.

John J Naughton

Matthew Austin Tyler

Mark Michael Nelson

Patrick Franklin

Current protection in integrated circuit having multiple pads. Different types of current protection structures may be associated with different pads. A common current discharge or charge path may be used to provide current to or draw current from various of these heterogenic current protection structures. Since a common current discharge or charge path is used, the metallization used to formulate a discharge solution is significant simplified. Additionally, the protection structures may be provided with selectively conductive regions that are approximately radially symmetrical around the circumference of the pad. Accordingly, if the protection structures are slightly off center with respect to the bond pad (due to, for example, mask alignment error), the error in the amount of active region around the circumference of the pad is at least partially averaged out.

Multi-pad shared current dissipation with heterogenic current protection structures

In one embodiment, an EEPROM device is formed to include a metal layer having an opening therethrough. The opening overlies a portion of a floating gate of the EEPROM device.

Method of forming an EEPROM device and structure therefor

A method of fabricating a semiconductor device includes patterning a layer of photoresist onto a surface of a wafer to define metal feature areas and residual metal areas. A layer of metal is deposited over the patterned layer of photoresist, the metal layer includes metal feature portions in the metal feature areas, residual metal areas in the residual metal areas, and residual metal flaps at the edges of the metal feature portions. The wafer is sprayed with high-pressure solvent at a pressure to dissolve the layer of photoresist and to physically remove the residual metal portions from the residual metal areas, leaving only at least a portion of the residual metal flaps. The wafer is sprayed with a stream of frozen gas particles to remove the residual metal flaps.

Metal lift-off systems and methods using liquid solvent and frozen gas

A current protection circuit that uses a sequence of bipolar transistors to provide or draw current from a protected circuit node. An initial bipolar transistor has its emitter terminal coupled to the protected circuit node, with its collector terminal coupled to a current source or sink. One or more additional intermediary bipolar transistors are also provided in the sequence. Each additional intermediary bipolar transistor has its emitter terminal coupled to the base terminal of the previous bipolar transistor in the sequence, and has its collector terminal coupled to the current source or sink. To complete the sequence, a reverse-biased diode is coupled between the base terminal of the final intermediary bipolar transistor and the current source or sink. This allows for effective triggering of current protection for a protected circuit node without requiring a zener diode.

Current protection circuit using multiple sequenced bipolar transistors

A current dissipation circuit that dissipates excess current to or from a circuit node when that monitored circuit node experiences abnormal voltage conditions, rather than having that excess current being dissipated through other protected circuitry. The current dissipation circuit may use single well technology, and may even provide reverse voltage protection without necessarily triggering more significant current dissipation. In another embodiment, the current dissipation circuit is provided by a series connection of at least five alternating p-type and n-type regions provided between the monitored circuit node and a current source or sink.

Single well excess current dissipation circuit

A method for forming a pre-metallization layer on an underlying micro-structure, and a corresponding micro-structure formed by the method. The micro-structure may be a semiconductor circuit and/or a Micro-Electro-Mechanical Systems (MEMS) device. A first layer of undoped silicate glass is deposited on a micro-structure. Then, a layer of phospho silicate glass is deposited on the first layer of undoped silicate glass. This combination is then densified by applying a temperature to the combination that is sufficient to densify the layer of phospho-silicate glass, while being below the glass flow temperature. After densification, a second layer of undoped silicate glass is deposited on the densified layer of phospho silicate glass. Finally, the upper surface of the second layer of undoped silicate glass is polished using a chemical mechanical polishing process. The result is a dielectric layer of high density and low stress, and that reduces soft errors and defects.

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Idaho Falls, ID, United States of America

John J Naughton