Honeywell G.m.b.h.

John J Herman

Pankaj H Mody

Richard P Himmer

When an interlock trip condition occurs, a back tracing of interlock logic occurs by examining input signals to an output gate of the interlock logic to determine which input signal caused the interlock trip condition. If the input signal is a predetermined interlock condition, that signal is deemed to be the cause of the interlock trip, saved and displayed. If the input signal is the output of another gate, then the inputs to that gate are examined to determine which input signal caused that gate to switch state. This process is repeated until a predetermined interlock condition is found which has switched state. By knowing the structure of the interlock logic and knowing the state of logic signals outputted from the interlock logic, the determination is made and saved such that even if the predetermined interlock condition that caused the interlock trip subsequently changes state as a result of placing the device in a safe state, the cause of the interlock trip is ascertained and saved by this method.

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Ft. Washington, PA, United States of America

John J Herman