W. L. Gore & Associates, Inc.

Other

John J Budnaitis

Paul J Fischer

Mark F Sylvester

David B Noddin

William George Petefish

David A Hanson

Jimmy Leong

The present invention relates to a system and method for performing reliability screening on semi-conductor wafers and particularly to a highly planar burn in apparatus and method for uses including wafer level burn-in (WLBI), diced die burn-in (DDBI), and packaged die burn-in (PDBI). The burn-in system includes a burn-in substrate with a planar base, a temporary Z-axis connecting member, and a Z-axis wafer level contact sheet electrically coupled to one another for screening wafers, diced die, and packaged electronic components, their assembly and use.

Wafer level contact sheet and method of assembly

A constraining ring increases the modulus of an interconnect substrate to maintain flatness of the substrate. The constraining ring is made of materials selected to match the coefficient of thermal expansion of the substrate to that of the constraining ring. Circuit components including capacitors and resistors are formed on the constraining ring to provide enhanced electrical properties without adding to the size of the device.

Constraining ring for use in electronic packaging

Method of making a high planarity, low CTE base for semiconductor

Method of forming a wafer level contact sheet having a permanent z-axis

Wafer level burn-in system

Method for performing reliability screening and burn-in of

Method of wafer level burn-in

The present invention relates to a system and method for performing reliability screening on semi-conductor wafers and particularly to a highly planar burn in apparatus and method for uses including wafer level bum-in (WLBI), diced die burn-in (DDBI), and packaged die burn-in (PDBI). The burn-in system includes a burn-in substrate with a planar base, a temporary Z-axis connecting member, and a Z-axis wafer level contact sheet electrically coupled to one another for screening wafers, diced die, and packaged electronic components, their assembly and use.

Wafer level burn-in base unit substrate and assembly

High planarity and low thermal coefficient of expansion base for

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Eau Claire, WI, United States of America

John J Budnaitis